Multiplying unit used for RFID (Radio Frequency Identification) security chip, and implementation method

Abstract

The embodiment of the invention discloses a multiplying unit used for a RFID (Radio Frequency Identification) security chip, and an implementation method. The multiplying unit comprises a partial product generation circuit, a compression circuit and a carry-propagate adder, wherein the partial product generation circuit is used for generating a partial product and inputting the partial product into the compression circuit; the compression circuit is used for receiving the partial product generated by the partial product generation circuit, carrying out compression processing on the partial product to obtain a compressed temporary variable and inputting the temporary variable into the carry-propagate adder; and the carry-propagate adder carries out the compression processing on the temporary variable and obtaining a multiplication result. In the embodiment of the invention, a compact tree is mixed to reduce a summation series in a tree structure, a multiplying unit compact tree key path can be reduced, circuit time delay is shortened, the operation speed of the security chip is improved, the multiplying unit is suitable to be integrated into the RSA (Rivest, Shamir and Adleman) or ECC (Elliptic Curves Cryptography) coprocessor of an intelligent card chip to improve the working speed of the coprocessor.

Description

technical field [0001] The invention relates to the technical field of digital signal processing, in particular to a multiplier for an RFID security chip and an implementation method. Background technique [0002] The public key cryptosystem solves security problems such as key update and key transmission in the symmetric cryptosystem, so it can be widely used in the field of information security to ensure the confidentiality and integrity of information transmission and the signature between the two parties And verification. The RSA algorithm and the elliptic curve cryptosystem ECC have been widely used in the confidence security industry due to the security of the algorithm and the stability of the implementation. Most of the RSA and ECC algorithms have been implemented in the form of hardware coprocessors and integrated into security chips such as smart cards and USB shields. Hardware implementation of RSA and ECC needs to solve the key problem of fast realization of la...

AI Technical Summary

Problems solved by technology

The traditional Wallace compression tree is composed of 3-2 compressors or 4-2 compressors. When the number of partial products is large, the advantages of this type of compression tree architecture are limited, and there are long combinatorial logic critical paths and delays. Larger problems, resulting in the security chip working speed is difficult to continue to improve

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