Novel high-speed self-starting sense amplifier circuit

Abstract

The invention discloses a novel high-speed self-starting sense amplifier circuit, which comprises a trigger circuit module and an amplifying circuit module, wherein the trigger circuit module tracks a bitline voltage swing to generate a starting signal SAE of the amplifying circuit module; a time sequence of the signal SAE is not affected by a process deviation of a storage unit; and the starting opportunity of the amplifying circuit module is relatively accurate. Compared with a traditional self-starting sense amplifier, the circuit disclosed by the invention can obviously reduce delay of the signal SAE, does not increase the area of a chip and improves the running speed of the chip.

Description

technical field [0001] The invention relates to the field of integrated circuit (IC) design, in particular to a high-speed, low-voltage and anti-process deviation SRAM sensitive amplifier circuit. Background technique [0002] Under the influence of process deviation in the chip, low-voltage SRAM memory cells are facing a serious problem of read timing control mismatch. The main reasons for this problem can be divided into two aspects. One is that the peripheral timing control circuit is affected by process deviation. On the other hand, it is caused by the process fluctuation inside the cell. Therefore, optimizing the timing control circuit of the sense amplifier has become an important problem in the optimization of SRAM. An effective read operation process needs to satisfy that when the voltage difference or current difference between the two bit lines is large enough, the sense amplifier should be turned on in time to amplify the signal, and the early turn-on signal will...

AI Technical Summary

Problems solved by technology

However, because the traditional timing control circuit and the actual storage column have their own process fluctuations, and this fluctuation becomes more serious as the process size decreases, resulting in a decrease in the reliability of the traditional timing control circuit

[0003] In order to obtain the optimal timing control, Shien-ChunLuo et al. proposed a sense amplifier technology with self-starting function in 2010. By tracking the discharge of the bit line, the technology self-starts the amplification operation of the potential difference between the bit lines. Compared with the inverter chain and copy bit line technology, it has better read fault tolerance and can more accurately track the discharge of the bit line. However, the delay of the SAE signal generated by this technology is longer, which affects the overall read speed of the SARM.

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