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Successive approximation analog-to-digital converter and correction method

An analog-to-digital converter, successive approximation technology, applied in the direction of analog-to-digital converter, analog/digital conversion, analog/digital conversion calibration/test, etc. Avoid switch switching and increase the effect of conversion accuracy

Active Publication Date: 2016-07-27
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, this patent proposes an analog background correction technology, which not only retains the advantages of digital background correction without interrupting the normal quantization of ADC, but also avoids the disadvantages of large digital correction area and power consumption

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  • Successive approximation analog-to-digital converter and correction method
  • Successive approximation analog-to-digital converter and correction method
  • Successive approximation analog-to-digital converter and correction method

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Embodiment Construction

[0041] Below in conjunction with accompanying drawing, provide the concrete implementation case of the present invention. It should be noted that the parameters in the implementation examples do not affect the generality of the present invention.

[0042] The DAC array consists of a main DAC and a correction DAC (eg image 3 shown). Among them, the main DAC is a binary segment capacitor structure, the high segment has 8 binary capacitors and a redundant capacitor, and the low segment has 3 binary capacitors; the correction DAC has a 7-bit binary capacitor structure. Main DAC high-level redundancy capacitor C 5R The position is between the high 5 bits and the low 3 bits of the high section of the main DAC, and its capacitance is the same as the minimum capacitance C among the high 5-bit capacitors. 5 The capacitance values ​​are equal, and its role is to replace the low 3-bit capacitors of the main DAC high stage and all capacitors in the low stage during redundant switching...

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Abstract

The invention discloses a successive approximation analog-to-digital converter and a correction method. The converter comprises a fully differential structured DAC based on common mode voltage restoration. The mismatch error of capacitance can be eliminated by background correction technologies. For an ideal binary capacitor array, the weight of one capacitor is equal to the sum of all weights of low position capacitors. However, mismatch of capacitance makes them different. According to the method of the invention, a redundancy switch is performed to compare the capacitance of a to-be-corrected to the sum of all weights of capacitances of the low position capacitors. Based on the two switching results of a redundancy switch of the to-be-corrected capacitor and a normal switch as well as the switching direction of the to-be-corrected capacitor, the correcting codes for each to-be-corrected capacitor are updated and stored at the background. And during ADC conversion, through a correcting DAC, the added value of the correcting codes is converted to analog quantity that is coupled to a main DAC. The system corrects all capacitances requiring correction successively and such process repeats itself.

Description

technical field [0001] The invention belongs to the technical field of analog-to-digital conversion, and in particular relates to an analog-to-digital converter and a processing method thereof. Background technique [0002] The digital-to-analog converter (DAC) in a conventional charge-redistribution SARADC consists of an array of capacitors. As one of the key units of SARADC, the accuracy of the digital-to-analog converter (DAC) composed of binary weighted capacitor array directly determines the accuracy of the entire analog-to-digital converter (ADC). Under the existing process conditions, the parasitic resistance and parasitic capacitance of various devices and traces, as well as errors in the process of manufacturing, make the double relationship between the capacitances of adjacent bits of the DAC inaccurate, which greatly limits the ADC. Increased accuracy. [0003] In order to improve the accuracy of ADC, many correction techniques have been proposed. Correction te...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10H03M1/14
CPCH03M1/1028H03M1/145
Inventor 宁宁王岑王伟杜翎廖京张中
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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