Plasma enhanced chemical vapor deposition of films for improved vertical etch performance in 3D NAND memory devices

Abstract

Implementations of the present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.

Description

technical field [0001] Implementations of the present disclosure generally relate to thin films defined in conjunction with high aspect ratio features and methods of forming the same. Background technique [0002] As circuit density increases in next-generation devices, interconnects such as vias, trenches, contacts, gate structures, and other features, as well as the width of dielectric material between interconnects, will shrink in size down to 45nm and 32nm, while the thickness of the dielectric layer remains substantially constant, which results in an increased feature aspect ratio. To enable the fabrication of next-generation devices and structures, three-dimensional (3D) stacking of semiconductor chips is often utilized to improve transistor performance. By arranging transistors in three dimensions instead of the conventional two, multiple transistors can be arranged in close proximity to each other in an integrated circuit (IC). Three-dimensional (3D) stacking of se...

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Problems solved by technology

However, the high energy required to achieve a straight etch profile using conventional single-operation etch recipes can result in plasma damage to the top surface of the structure

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