Device and method for refreshing DRAM (dynamic random access memory) or eDRAM(enhanced dynamic random access memory)

A control device and refresh cycle technology, applied in information storage, static memory, digital memory information and other directions, can solve the problems of reducing the amount of DRAM read and write, increase of read and write delay time, etc., to achieve the coordination and reduction of refresh and read and write work. The effect of delay in reading and writing and increasing work efficiency

Inactive Publication Date: 2016-11-16
田彬
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When DRAM is being refreshed, read and write operations cannot be performed. This period of time is called dead time, which reduces the amount of DRAM read and write and increases the delay time of read and write.

Method used

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  • Device and method for refreshing DRAM (dynamic random access memory) or eDRAM(enhanced dynamic random access memory)
  • Device and method for refreshing DRAM (dynamic random access memory) or eDRAM(enhanced dynamic random access memory)
  • Device and method for refreshing DRAM (dynamic random access memory) or eDRAM(enhanced dynamic random access memory)

Examples

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Embodiment Construction

[0030] The present invention will be further described in detail below in conjunction with the accompanying drawings, so that those skilled in the art can implement it with reference to the description.

[0031] Such as figure 1 Shown is the schematic diagram of the work of the existing centralized refresh device, its refresh cycle (data retention time) includes two parts: read, write and refresh, and it cannot perform read and write operations during refresh, so that the work of DRAM or eDRAM Efficiency becomes lower.

[0032] Such as figure 2 Shown is a working schematic diagram of the DRAM or eDRAM refresh device of the present invention, the DRAM or eDRAM refresh device sets the refresh cycle to be shorter than the data retention time, and the data retention time is 1-3 seconds. In each refresh cycle, the time domain is divided into three parts. The first part is called the centralized refresh time. The first part is for centralized refresh, but when there is a read and...

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PUM

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Abstract

The present invention relates to a device and a refresh method for DRAM or eDRAM refresh, which are used to perform a refresh operation within the data retention time of each database of DRAM or eDRAM, comprising: a refresh control device, which is used to control the refresh cycle to be less than the data Keeping time, and controlling whether to generate a refresh signal: a memory control device, which receives a read-write request, and sends a read-write request or a refresh command to the memory according to the signal generated by the refresh control device; wherein, the memory control device is sending to the memory After the memory sends a refresh request, if a read / write request is received during the refresh execution process, the memory control device asks the refresh control device whether to interrupt the refresh and execute the read / write operation, and the refresh control device generates a signal to suspend refresh under predetermined conditions. The invention can solve the problem that reading and writing cannot be performed during refreshing, thereby improving the performance effect of DRAM or eDRAM.

Description

technical field [0001] The invention relates to a refresh circuit, in particular to a device and a refresh method for DRAM or eDRAM refresh. Background technique [0002] DRAM (Dynamic Random Access Memory), that is, dynamic random access memory, is the most common system memory. DRAM can only hold data for a short time. In order to keep data, DRAM uses capacitor storage, so it must be refreshed once in a while. If the storage unit is not refreshed, the stored information will be lost. Since DRAM is manufactured by MOS technology, capacitors are used as memory cells. DRAM has low power consumption and is slow. On the other hand, static random access memory (SRAM) is fast and does not need to be refreshed, however, the area of ​​static random access memory (SRAM) is too large and more expensive, so DRAM is more widely used than SRAM. [0003] Static Random Access Memory (SRAM) uses flip-flops to store information, while DRAM uses capacitors to store information. But the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
CPCG11C11/40611
Inventor 田彬
Owner 田彬
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