Supercharge Your Innovation With Domain-Expert AI Agents!

Simulation method and system of LC-VCO (Inductance Capacitance-Voltage Controlled Oscillator)

A technology of LC-VCO and simulation method, applied in instrumentation, calculation, electrical digital data processing, etc., can solve problems such as large phase noise and affect design accuracy, and achieve the effect of improving phase noise

Active Publication Date: 2016-12-07
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method can simplify the simulation process. However, in the actual circuit, the phase noise at the low frequency offset is large, which affects the accuracy of the design.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Simulation method and system of LC-VCO (Inductance Capacitance-Voltage Controlled Oscillator)
  • Simulation method and system of LC-VCO (Inductance Capacitance-Voltage Controlled Oscillator)
  • Simulation method and system of LC-VCO (Inductance Capacitance-Voltage Controlled Oscillator)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0061] In this embodiment, the NMOS device and the PMOS device are respectively (g m / I D ) n and (g m / I D ) p The following parameters are simulated, and the simulation results are judged by the device simulation performance parameter values ​​to improve the phase noise at the low frequency offset.

[0062] In step S103, keep I d unchanged, for NMOS devices, according to the relationship curve, the NMOS devices are obtained in (g m / I d ) n Under N device electrical parameter value, (g m / I d ) n =(g m / I d ) 0 +△n; for PMOS devices, according to the relationship curve, the PMOS device is obtained in (g m / I d ) p Under the P device electrical parameter value, (g m / I d ) p =(g m / I d ) 0 -△n, △n is the variation of transconductance efficiency.

[0063] In this step, it is carried out under the condition that the power consumption of the device remains unchanged, that is, the leakage current I of the device is kept d remain unchanged, and keep the osc...

Embodiment 2

[0077] In this embodiment, the NMOS device and the PMOS device are respectively (g m / I D ) n and (g m / I D ) p The following parameters are simulated, and the simulation results are judged by the cut-off frequency or threshold voltage after oscillation, and the phase noise at the low frequency offset is improved.

[0078] Such as image 3 As shown, it is a schematic structural diagram of an analysis model of an LC-VCO according to an embodiment of the present invention. In this analysis model, the source terminals of the first PMOS device M1 and the second PMOS device M2 are connected to a DC bias voltage, and the first PMOS device M1 It forms an inverter with the first NMOS device M3, and the second PMOS device M2 and the second NMOS device M4 form an inverter. These two inverters are connected end to end to form a ring structure. At the same time, based on the analysis structure of the AC small signal, The resonant cavity of the inductance and capacitance is split int...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a simulation method of a LC-VCO (Inductance Capacitance-Voltage Controlled Oscillator). The simulation method comprises the following steps: independently obtaining a relationship curve between the transconductance efficiency gm / Id and the device parameter of the NMOS (N-channel metal oxide semiconductor) device and the PMOS (P-channel Metal Oxide Semiconductor) device of a LC-VCO simulator model; setting initial transconductance efficiency (gm / Id)0; according to the relationship curve, obtaining the N device electrical parameter value of the NMOS device under (gm / Id)0+[Delta]n, and obtaining the P device electrical parameter value of the PMOS device under (gm / Id)0-[Delta]n; independently obtaining the device parameter values under the N device electrical parameter value and the P device electrical parameter value; carrying out the simulation of a circuit equivalent model by the device parameter values to obtain a simulation result; and judging whether iteration is carried out or not. By use of the method, phase noise at a low frequency deviation obtains an optimal value so as to improve the phase noise at the low frequency deviation.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to an LC-VCO simulation method and system. Background technique [0002] Inductor-capacitance-voltage-controlled oscillator (LC-VCO) is mainly used in systems such as phase-locked loops and radio frequency transceivers. During system design, performance indicators such as power consumption, phase noise, and tuning range, as well as the compromise of inductance selection, are mainly considered. Content. [0003] In the existing LC-VCO simulation method, one method is to obtain the g of the NMOS device and the PMOS device respectively m / I d Change curves with leakage current and parasitic capacitance, and g can be obtained through these curves m / I d The electrical parameter values ​​under the numerical values ​​are used to obtain the parameter values ​​of the device, and the circuit simulation is performed through these device parameter values ​​to obtain the parameters ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 王海永霍允杰陈岚
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More