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Embedded system for running asymmetric encryption algorithm

An embedded system and asymmetric encryption technology, which is applied in the transmission system, digital transmission system, calculation, etc., can solve the problems of high overall cost, difficulty, and poor applicability

Inactive Publication Date: 2016-12-07
苏州国芯科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The purpose of the present invention is to provide an embedded system that runs an asymmetric encryption algorithm, and the purpose is to solve the problems of high overall cost, high difficulty and poor applicability in the prior art

Method used

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  • Embedded system for running asymmetric encryption algorithm
  • Embedded system for running asymmetric encryption algorithm
  • Embedded system for running asymmetric encryption algorithm

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Embodiment approach

[0049] As a specific implementation, the FPGA module realizes access to the HPS bus slave in the processor through the FPGA-to-HPS bridge; the HPS bus master of the processor passes the HPS-to-FPGA bridge and the Lightweight HPS-to -FPGA Bridge, enabling access to the bus slaves in the FPGA.

[0050] Please refer to image 3 as well as Figure 4 The schematic diagram of the Cyclone V chip module and the schematic diagram of the application system provided by the embodiment of the present invention, the FPGA in the Cyclone V chip and the system based on the ARM Cortex-A9 hardware processor can not only run independently, but also can be processed by the ARM The AXITM bus bridge broadband system enables interconnect performance not available in two-chip solutions. Through the FPGA-to-HPS bridge, the IP bus master in the FPGA can access the HPS bus slave. At the same time, through the HPS-to-FPGA bridge and the Lightweight HPS-to-FPGA bridge, the HPS bus master can access the...

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Abstract

The invention discloses an embedded system for running an asymmetric encryption algorithm. The embedded system comprises: a processor, an FPGA module and an internal bus; the processor is a hard core processor system and is integrated in a framework of the FPGA module, and the processor and the FPGA module are connected by the internal bus; and the processor is used for receiving an asymmetric operation instruction and operation data, writing hardware acceleration logic of asymmetric operation in the FPGA module, configuring the architecture of the FPGA module, and calling the FPGA module to accelerate the asymmetric operation. According to the embedded system disclosed by the invention, a high-performance universal embedded CPU and the FPGA module for accelerating the asymmetric operation are connected by the high-speed internal bus, so that the performance of asymmetric encryption and decryption operation can be up to hundreds of times per second, the embedded system can be applied to application occasions requiring frequent asymmetric operation, and meanwhile can reduce the overall cost and difficulty of the scheme.

Description

technical field [0001] The invention relates to the technical field of single-chip microcomputers, in particular to an embedded system running an asymmetric encryption algorithm. Background technique [0002] At present, asymmetric encryption and decryption algorithms such as RSA and ECC algorithms are widely used in banking systems, network security certification, and online trading platforms to identify trusted users, trusted websites, and so on. The principle is that the public key and private key are stored separately, the public key is used to ensure the legitimacy of the security platform, and the private key is used to ensure the uniqueness of the user who holds the private key. U-shields, IC cards, etc. are commonly used mobile devices for storing and performing public and private key calculations. Due to reasons such as size and power consumption, the computing performance is often relatively low, which cannot meet the growing needs of customers. [0003] There are...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/08H04L29/06G06F9/30G06F13/40
CPCH04L9/0825G06F9/30007G06F13/4027H04L63/0442
Inventor 郑茳肖佐楠匡启和王廷平聂智王忠海
Owner 苏州国芯科技股份有限公司