Linear equalizer applicable to high-speed serial interface

Abstract

The present invention relates to a linear equalizer applicable to a high-speed serial interface, comprising a differential input pair transistor consisting of a first NMOS transistor M1 and a second NMOS transistor M2, a bias current source consisting of a third NMOS transistor M3 and a fourth NMOS transistor M4, a pair of differential input signals VINP and VINN, and a pair of differential output signals VOUTP and VOUTN. The linear equalizer further comprises a capacitance-resistance negative feedback equalizer circuit consisting of a variable resistor RS and a variable capacitor CS and an active inductor consisting of a resistor RG and a fifth NMOS transistor M5, which form an output load together with two load resistors RL. According to the linear equalizer applicable to a high-speed serial interface, an active inductor can generate a null point higher than channel bandwidth, and provide broader bandwidth and a greater high-frequency gain in a high-speed serial data transmission process, so that equalizer performance is improved, and a chip area of an integrated circuit chip is effectively reduced, thereby reducing power consumption.

Description

technical field [0001] The invention relates to a linear equalizer suitable for high-speed serial interfaces, belonging to the technical field of integrated circuit design and signal integrity. Background technique [0002] In the field of high-speed signal transmission, compared with the synchronization problem between queues and the influence of crosstalk noise in parallel communication, serial communication has become the mainstream technology for high-speed data transmission due to its low cost and excellent anti-interference performance. As the transmission data rate becomes faster and faster, higher requirements are placed on the transmission bandwidth. [0003] A serializer-deserializer (SerDes, Serializer / Deserializer) is a typical representative of a serial link. figure 1 It is a structural block diagram of a serializer-deserializer (SerDes), which mainly introduces the working principle of a high-speed serial interface circuit. In the transmitting end, a phase-lo...

AI Technical Summary

Problems solved by technology

The trade-off between gain and bandwidth limits the application of traditional structures in high-speed transmission systems

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