Thin film transistor, manufacturing method and display panel

Abstract

The invention discloses a thin film transistor, a manufacturing method and a display panel and belongs to the thin film transistor manufacturing technical field. The manufacturing method includes the following steps that: a polysilicon pattern, a gate insulating layer and a gate pattern with photoresist are formed on a substrate, wherein the polysilicon pattern contains an active layer, a source region and a drain region; the gate insulating layer is etched, so that an inclination angle can be formed between the sidewall of the etched gate insulating layer and the upper surface of the polysilicon pattern, and the etched gate insulating layer covers the active layer and exposes the source region and the drain region; ion implantation is carried out from the source region and drain region of the polysilicon pattern, so that two groups of doped regions located at two ends of the active layer can be formed, wherein each group of doped regions comprises a heavily doped region and a lightly doped region which are connected with each other; and after the ion implantation is completed, the photoresist is stripped. With the manufacturing method of the present invention adopted, the thermoelectron effect of the thin film transistor can be reduced, and the manufacturing process of the thin film transistor is simplified. The manufacturing method of the present invention is used for manufacturing a thin film transistor.

Description

technical field [0001] The invention relates to the field of thin film transistor manufacturing technology, in particular to a thin film transistor, a manufacturing method, and a display panel. Background technique [0002] Low-temperature polysilicon thin-film transistors are generally used in liquid crystal displays and are the basic circuit components used to control the brightness of pixels. The low-temperature polysilicon thin film transistor mainly includes: a polysilicon layer, a gate insulating layer, a gate pattern, a source and a drain, and the like. Wherein, the polysilicon layer contains two N-type heavily doped regions with relatively high doping concentration. The distance between the two N-type heavily doped regions and the gate conductor is small, resulting in a strong electric field near the drain of the low-temperature polysilicon thin film transistor, and thus generating a hot electron effect, which affects the stability of the device. [0003] In the pr...

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