Binary field bit-width-variable modular multiplication operator

An operator and binary field technology, applied in instruments, calculations, and calculations using non-numerical representations, etc., can solve problems affecting performance, line delay, waste of resources, etc., to enhance applicability and reduce area. Effect

Active Publication Date: 2017-03-08
SOUTHEAST UNIV
View PDF6 Cites 11 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the past technology, for different bit widths, it is necessary to design different hardware circuits to adapt to the bit width, which will cause a lot of waste of resources on the hardware circuit, and at the same time, an excessively large area will also cause line delays. affect overall performance

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Binary field bit-width-variable modular multiplication operator
  • Binary field bit-width-variable modular multiplication operator
  • Binary field bit-width-variable modular multiplication operator

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0039] figure 1 It is a schematic diagram of the overall hardware structure of the modulo multiplier with variable bit width of the present invention. The binary domain bit-width variable modular multiplication operator includes a partial product multiplication unit 102, a word-level multiplication unit 103, an output buffer unit 104, and is characterized in that it also includes a data shift unit 101 and a control unit;

[0040] The control unit is simultaneously connected to the data shift unit, partial product multiplication unit, word-level multiplication unit and output buffer unit; the control unit is a state machine, which controls the data shift unit, partia...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a modular multiplication operator implemented by a series-parallel combination way, and belongs to the field of elliptic curve cryptography algorithms. The binary field bit-width-variable modular multiplication operator comprises a partial product multiplication unit, a word level multiplication unit, an output cache unit, a data shifting unit and a control unit. The modular multiplication operator is based on a polynomial basis under a binary field; input data are read in an MSB-first (Most Significant Bit first) way; the step number of loop computing is controlled according to computing digits by a state machine; a word multiplication operation and a partial multiplication operation are performed concurrently in the steps; and lastly, computing results in all the steps are integrated, and output in series. The operating rate is increased in the series-parallel combination way, and the computing complexity is lowered. Meanwhile, a bit multiplier capable of computing data of a plurality of bit widths is designed internally, so that reutilization of a hardware structure is realized. Compared with the prior art, the modular multiplication operator is more advantageous on the aspects of area, flexibility and the like, and a relatively high operation rate is ensured at the same time.

Description

technical field [0001] The invention relates to the hardware realization field of an elliptic curve encryption (ECC) algorithm, in particular to a low-level modular multiplication operator capable of calculating data with different bit widths under a binary domain polynomial basis. Background technique [0002] In the field of information security, more and more information is exchanged in open media. In order to ensure the security and confidentiality of information exchange, various cryptography was born and widely used in the field of wireless network communication. Currently, the commonly used public key cryptographic algorithms are RSA and elliptic curve cryptographic algorithms. The security foundation of the elliptic curve cryptography algorithm is built on the difficulty of the elliptic curve discrete logarithm problem (ECDLP), which has a completely exponential computational complexity. Moreover, 160-bit ECC can provide a security strength equivalent to 1024-bit RS...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72
CPCG06F7/722
Inventor 赵霞陈佳旭黄琰玲梅灵李冰刘勇董乾陈帅王刚
Owner SOUTHEAST UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products