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Fin field effect transistor and formation method thereof

A fin field effect and transistor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as low carrier mobility, and achieve the effect of improving mobility and high performance

Active Publication Date: 2017-03-08
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The problem to be solved by the present invention is to provide a fin field effect transistor and its forming method to solve the problem of low carrier mobility in the fin field effect transistor, so as to improve the performance of the fin field effect transistor

Method used

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  • Fin field effect transistor and formation method thereof
  • Fin field effect transistor and formation method thereof
  • Fin field effect transistor and formation method thereof

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Embodiment Construction

[0019] As mentioned in the background, the FinFETs formed in the prior art have poor performance.

[0020] The study found that in the actual process, in view of the fact that there are both N-type FinFETs and P-type FinFETs in the FinFETs, it is necessary to improve the electron mobility of the N-type FinFETs Moreover, the hole mobility of the P-type fin field effect transistor is improved, but the fin field effect transistor formed in the prior art does not have this performance.

[0021] An embodiment of the present invention provides a method for forming a fin field effect transistor. A semiconductor substrate is provided, the surface of the semiconductor substrate has a first fin and a second fin, and the first fin includes a second sub-fin and a second fin. The first sub-fin located on the top of the second sub-fin; the second sub-fin includes the fourth sub-fin and the third sub-fin located on top of the fourth sub-fin; through the first sub-fin and the second sub-fin ...

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Abstract

The invention provides a fin field effect transistor and a formation method thereof. The method comprises a step of providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a first fin and a second fin, the first fin comprises a second sub fin and a first sub fin at the top of the second sub fin, the second fin comprises a fourth sub fin and a third sub fin at the top of the fourth sub fin, a step of forming a first side wall at the side wall of the second sub fin, a step of forming a second side wall at the side wall of the third sub fin, a step of forming silicon germanium layers at the side walls of the first fin and the second fin, wherein the silicon germanium layers cover the first side wall and the second side wall, a step of carrying out oxidation processing on the silicon germanium layers such that the germanium atoms in the silicon germanium layers enter into the first sub fin and the fourth sub fin, and a step of orderly removing the silicon germanium layers, the first side wall and the second side wall after the oxidation processing. According to the method, the performance of the fin field effect transistor is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a fin field effect transistor and a forming method thereof. Background technique [0002] MOS transistors are one of the most important components in modern integrated circuits. The basic structure of a MOS transistor includes: a semiconductor substrate; a gate structure located on the surface of the semiconductor substrate, a source region located in the semiconductor substrate on one side of the gate structure, and a drain region located in the semiconductor substrate on the other side of the gate structure. The working principle of the MOS transistor is: by applying a voltage to the gate, the current through the channel at the bottom of the gate structure is adjusted to generate a switching signal. [0003] With the development of semiconductor technology, the ability of the traditional planar MOS transistor to control the channel current becomes weaker, resulting i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/66H01L29/10H01L29/78
CPCH01L29/1054H01L29/66795H01L29/785
Inventor 邓浩
Owner SEMICON MFG INT (SHANGHAI) CORP
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