Method for manufacturing CMOS

Abstract

The invention discloses a method for manufacturing a CMOS. The method includes the following steps: forming a fin-shaped fist channel layer extending along a first direction in the first region and the second region of a substrate; forming a pseudo-gate stack extending along a second direction on the first channel layer; forming a source-drain region extending along the first direction on two sides of the pseudo-gate stack of the first channel; removing the pseudo-gate stack in the second region; at least partially removing the first channel layer from the second region; forming a fin-shaped second channel layer extending along the first direction in the second region of the substrate; removing the pseudo-gate stack from the first region; and forming a gate stack extending along the second direction in the first channel and the second channel. According to the invention, the method selectively etch-backs part of a first high-mobility fin and epitaxially grows a second high-mobility fin of a different material, which increases the mobility rate and drive capability of current carriers of the CMOS.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing a FinFET type CMOS with a high-mobility channel. Background technique [0002] In the current sub-20nm technology, the three-dimensional multi-gate device (FinFET or Tri-gate) is the main device structure, which enhances the gate control capability and suppresses leakage and short channel effects. [0003] For example, compared with the traditional single-gate body Si or SOIMOSFET, the double-gate SOI MOSFET can suppress the short-channel effect (SCE) and drain-induced barrier lowering (DIBL) effects, and has lower junction capacitance. The channel is lightly doped, and the threshold voltage can be adjusted by setting the work function of the metal gate, which can obtain about 2 times the driving current and reduce the requirements for the effective gate oxide thickness (EOT). Compared with the double-gate device, the gate of the tri...

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Problems solved by technology

A common process is to form a fin structure by etching after the epitaxial growth of high-mobility materials on the substrate, and then form a gate on the fin structure and form a source and drain region in the fin structure to complete the device manufacturing. This process is often The same high-mobility material can only be deposited on the wafer substrate at one time, that is, the growth is global, which is not conducive to the mixed integration of local devices and CMOS in the circuit

In addition, the mixed growth of different high-mobility materials is prone to cross-interference, which affects the surface quality of the channel and reduces the reliability of the device.

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