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Semiconductor structure and forming method thereof

A technology of semiconductor and gate structure, applied in the field of semiconductor structure and its formation, can solve the problems of performance degradation and stability deterioration, and achieve the effect of improved performance and stable electrical performance

Active Publication Date: 2017-04-19
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, as the device density in the SRAM increases and the size shrinks, the performance of the SRAM composed of FinFETs also decreases and the stability deteriorates.

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0033] As mentioned in the background art, as the device density in the SRAM increases and the size shrinks, the performance of the SRAM composed of fin field effect transistors also decreases, and the stability becomes poor.

[0034] Please refer to figure 1 with figure 2 , figure 1 with figure 2 It is a structural schematic diagram of an embodiment of a storage unit of a static random access memory, figure 1 yes figure 2 Schematic diagram of the cross-sectional structure along the direction AA'. The storage unit includes:

[0035]A substrate 100, the substrate 100 includes an adjacent P-type region 110 and an N-type region 120, the surface of the P-type region 110 of the substrate 100 has a first fin 131, and the N-type region of the substrate 100 The second fin 132 and the third fin 133 on the surface of 120, the substrate 100 and the first fin 131 of the P-type region 110 have a first well region 111, the substrate 100 of the N-type region 120, the first There is...

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PUM

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Abstract

A semiconductor structure and a forming method thereof are disclosed. The semiconductor structure comprises a substrate including a first area and a second area which are adjacent to each other, and of which the surfaces are provided fin portions respectively, an isolation groove positioned in the substrate and between the first area and the second area, and an isolating layer which is positioned on the surface of the substrate in the isolation groove, fills the isolation groove, and also is positioned on partial surface of the fin portions. The surface of the isolating layer is lower than the top surfaces of the fin portion. The semiconductor structure also comprises first well regions in the substrate of the first area and the fin portions, and a second well regions in the substrate of the second area and the fin portions. The performance of the semiconductor structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] Static Random Access Memory (SRAM), as a member of memory, has the advantages of high speed, low power consumption and compatibility with standard processes, and is widely used in computers, personal communications, consumer electronics (smart cards, digital cameras, Multimedia player) and other fields. [0003] The storage unit of the SRAM includes a 4T (transistor) structure and a 6T (transistor) structure. For a 6T SRAM size unit, it includes: a first PMOS transistor P1 , a second PMOS transistor P2 , a first NMOS transistor N1 , a second NMOS transistor N2 , a third NMOS transistor N3 and a fourth NMOS transistor N4 . Wherein, the P1 and P2 are pull-up transistors; the N1 and N2 are pull-down transistors; and the N3 and N4 are transfer transistors. [0004] With the im...

Claims

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Application Information

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IPC IPC(8): H01L21/8244H01L27/11
CPCH10B10/00H10B10/12
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP