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Functional test method for SiP (system in package) embedded memory

A technology of functional testing and memory, which is applied in the direction of electronic circuit testing, instruments, measuring electronics, etc. It can solve problems such as difficult fault detection, high reliability requirements, and limited signals, so as to improve test efficiency, increase fault coverage, The effect of improving reliability

Inactive Publication Date: 2017-05-10
TIANJIN JINHANG COMP TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] SiP implements the functions of board-level systems, but all its devices are packaged in one package, and its external pins and detectable signals are relatively limited, so its fault detection is more difficult than board-level systems
In addition, in some SiP application fields, the reliability requirements are extremely high, and it is not reliable enough to only guarantee the correctness of its functions

Method used

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  • Functional test method for SiP (system in package) embedded memory
  • Functional test method for SiP (system in package) embedded memory
  • Functional test method for SiP (system in package) embedded memory

Examples

Experimental program
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Embodiment

[0042] This embodiment applies the test flow and test method of the technical solution of the present invention, based on the functional test requirements of a certain SiP dual-port RAM, the test connection structure diagram of the dual-port RAM is shown in the attached figure 1 As shown, perform a functional test on it;

[0043] Firstly, the screening test is carried out, and the independent screening test process of dual-port RAM is attached figure 2 Shown:

[0044] (1) Test the main control unit CPU1 using a three-step method to test the data bus and address bus on the side of the dual-port RAM1 connected to the test main control unit CPU1;

[0045](2) the test main control unit judges whether there is a fault in the data bus and the address bus test of the dual-port RAM1 this side, if there is a fault, the test is interrupted and the fault is fed back to the test user; if there is no fault, continue the test, and go to step (3) );

[0046] (3) The test main control uni...

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Abstract

The present invention belongs to the SiP testing technical field and relates to a functional test method for a SiP (system in package) embedded memory. According to the functional test method of the invention, a functional test and structural test-combined ideal is adopted to carry outer a detailed function test on SiP, and therefore, on the one hand, a fault coverage rate can be increased, the reliability of SiP application can be improved, and on the other hand, test efficiency can be improved to a certain extent.

Description

technical field [0001] The invention belongs to the technical field of SiP testing, and in particular relates to a function testing method for SiP embedded memory. Background technique [0002] System in Package (SiP) is a packaging concept completely different from traditional electronic packaging. SiP refers to a high-density integration technology that integrates a high-performance system composed of multiple semiconductor bare chips and possible passive components into one package, and uses chip combinations most effectively to complete certain system functions. [0003] At present, there is no mature test method for the functional test of SiP, and most of them refer to the test method of PCB board level. In the actual board-level test, the circuit is loaded with excitation to test whether the output state of the device pin matches the expected state. If the logic function of the device is normal, it can be considered that the circuit function is normal and there is no ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2815
Inventor 刘慧婕王可李岩纪策
Owner TIANJIN JINHANG COMP TECH RES INST
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