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A readout circuit and readout method for high-density spad array-level analog signals

A technology for reading out circuits and analog signals, which is used in TV, electrical components, image communication, etc. to reduce noise, reduce noise, and facilitate overall reset.

Active Publication Date: 2020-05-19
NANJING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The technical problem to be solved by the present invention is to reduce the proportion of the area occupied by the digital circuit in the pixel unit, reduce the noise, and improve the readout of the single photon avalanche diode detector array-level analog signal

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  • A readout circuit and readout method for high-density spad array-level analog signals
  • A readout circuit and readout method for high-density spad array-level analog signals
  • A readout circuit and readout method for high-density spad array-level analog signals

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Embodiment Construction

[0025] The specific implementation of the present invention will be further described in detail in conjunction with the accompanying drawings.

[0026] The present invention proposes a readout circuit architecture and method for high-density SPAD array-level analog signals. The readout method is parallel readout. Noise can be eliminated through correlated double sampling technology, and regular read pixels can be easily implemented. Unit performs partial reset

[0027] The pixel unit array is suitable for large-scale analog counting to the peripheral array-level readout circuit, and can reduce the noise generated by analog readout and improve the detection accuracy of the detector. The SPAD array architecture proposed by the present invention, such as figure 1 shown. It mainly reads out the pixel units in the array by row and converts the output analog signal into a digital signal through denoising, external decoding and other steps for long-distance transmission. The reado...

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Abstract

The invention discloses a readout circuit and a readout method for high-density SPAD array-level analog signals. The circuit includes a gray code generator, a 3‑8 address decoder, a row address decoder, a row partial reset control circuit, a multiplexer, correlated double sampling, an analog-to-digital converter, a clock and several pixel units. The Gray code generator provides counting signals for the row address decoder, 3-8 address decoder, and multiplexer. The row address decoder is controlled by Gray code, and the output strobes a certain row and operates it, and the global reset signal, partial reset signal and output terminal of row address decoder are connected to row partial reset control circuit. The multiplexer selects and outputs the 8-column signals input to the relevant double-sampling circuit in turn, and the Gray code generator provides a 3-bit strobe signal, which is connected to the same control signal as the multiplexer when reading out, and is connected to the row Partial reset can be performed in cooperation with the partial reset control circuit. The invention can greatly reduce the area of ​​the chip and reduce the noise.

Description

technical field [0001] The invention relates to a readout circuit and a readout method of an array-level analog signal of a single-photon avalanche diode detector based on an analog photon counting technology, and belongs to the field of optoelectronic technology. Background technique [0002] Single-photon avalanche diode (Single-Photon Avalanche Diode, SPAD) detection devices have high sensitivity and high time precision resolution, and have been widely used in biomedicine, military and optical communication and other fields. The SPAD device is already compatible with the CMOS process. In order to realize the high integration of the single photon detector, it is necessary to reduce the size and power consumption of the circuit. The traditional SPAD detector pixel unit includes a single photon avalanche diode, quenching and reset circuit, digital counting circuit, latch and related auxiliary circuits. However, as the density of the array continues to increase, due to the wi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/357H04N5/378
CPCH04N25/60H04N25/75
Inventor 徐跃罗瑞明李斌李鼎赵庭晨
Owner NANJING UNIV OF POSTS & TELECOMM
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