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A method and system for extracting resistance model considering layout environment

A technology of resistance model and extraction method, which is applied in electrical digital data processing, instrumentation, calculation, etc., and can solve problems such as different heat absorption effects and deviations in the use of resistance

Active Publication Date: 2020-10-27
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0007] It can be seen that the resistance model is only related to size, voltage, and temperature, and does not consider the influence of the surrounding environment (dummy) on the resistance model. In the actual process, different surrounding environments have different influences on the resistance, (such as different surroundings environment, which makes the heat absorption effect of the device different, so that the crystal structure inside the device and the CD in the process are different), which leads to a certain deviation from the actual use of the resistor

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  • A method and system for extracting resistance model considering layout environment
  • A method and system for extracting resistance model considering layout environment
  • A method and system for extracting resistance model considering layout environment

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[0041] The implementation of the present invention is described below through specific examples and in conjunction with the accompanying drawings, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0042] figure 1 It is a flow chart of the steps of a resistance model extraction method considering the layout environment of the present invention. like figure 1 As shown, a method for extracting a resistance model considering the layout environment of the present invention includes the following steps:

[0043] Step 101, designing the structure of the resistive device under different su...

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Abstract

The invention discloses a resistance model extraction method and system considering layout environment. The method comprises the following steps of designing resistance component structures in different surroundings; measuring current data of resistance components at different voltages; establishing a basic resistance model, obtaining resistance model parameters; adjusting the parameters in the basic resistance model, conducting curve fitting; when curve fitting results meet requirements, establishing and correcting the resistance model related to the surroundings; adjusting the parameters related to the surroundings in the resistance model related to the surroundings, and conducting curve fitting. By the resistance model extraction method and system considering layout environment, the characteristics of a resistance in different surroundings are described more accurately, and more accurate and practical resistance model is established.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a method and system for extracting a resistance model considering layout environment. Background technique [0002] With the continuous advancement of semiconductor manufacturing technology, the CMOS process device manufacturing process has been developed to the nanometer level, and the current minimum size has been reduced to 20 nanometers, and the research and development of 10 nanometers has been put on the agenda. With the development of manufacturing technology, the electrical characteristics of a device are no longer only affected by some physical parameters of itself, and the surrounding device environment also has an increasing influence on the electrical characteristics of the device itself. For the resistance model, the surrounding environment of the device is the relationship between the distance and density of different dummy from the layout point of view. In advan...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 张瑜商干兵俞柳江
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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