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A Wafer Slicing Method with Chips Irregularly Distributed

A cutting method and irregular technology, which are applied in the field of wafer cutting with irregularly distributed chips, can solve the problems of irregular wafer cutting that cannot be applied to chips, improve cutting efficiency, eliminate the influence of rotation angle, and have a wide range of applications. Effect

Active Publication Date: 2018-08-24
BEIJING SEMICON EQUIP INST THE 45TH RES INST OF CETC
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Problems solved by technology

[0005] The present invention proposes a wafer cutting method and device with irregular distribution of chips to solve the technical problem that the traditional cutting method cannot be applied to the cutting of wafers with irregular distribution of chips

Method used

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  • A Wafer Slicing Method with Chips Irregularly Distributed
  • A Wafer Slicing Method with Chips Irregularly Distributed
  • A Wafer Slicing Method with Chips Irregularly Distributed

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Embodiment Construction

[0053] The present invention proposes a laser cutting method for wafers with irregularly distributed chips, which mainly obtains the center position and rotation angle of the chip through image recognition, calculates each cutting corner point of the chip, and cuts each block intersection The corner points are averaged and corrected, and finally the position information of the entire wafer cutting is obtained, and the laser cutting is carried out along the cutting track of the chip through the galvanometer. The shape of the chip in this method can be quadrilateral, pentagonal, or hexagonal.

[0054] Such as Figure 1-7 As shown, this wafer cutting method with irregularly distributed chips uses a mobile workbench with a camera to scan the entire wafer. For each frame of image in the scanning process, the method of template matching is used to identify each to-be-processed image. The center position and rotation angle of the chip, and based on this, calculate the center point of...

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Abstract

A cutting method for a wafer with irregularly-distributed chips comprises the following steps of 1, controlling to move a workbench and a camera by a control module, and scanning the wafer on the workbench so as to achieve full image acquisition one by one; 2, processing each image obtained by scanning; 3, determining whether scanning on the wafer is completed or not; 4, integrating wafer data after the wafer scanning is completed; 5, judging whether cutting tracks of all chips to be processed in the whole wafer are determined or not; 6, inputting cutting position information of each chip to be processed into a galvanometer when that the cutting tracks of all chips to be processed are determined; and 7, moving the workbench to a part below the galvanometer, and controlling laser to cut the wafer by the galvanometer. By the cutting method, the cutting of the wafer with the irregularly-distributed chips formed by non-standard processing is achieved, and the cutting method has the characteristics of no cutting residue and high efficiency.

Description

technical field [0001] The invention belongs to the technical field of laser cutting, and relates to a wafer cutting method in which chips are irregularly distributed. Background technique [0002] Wafer dicing is an essential process in the semiconductor chip manufacturing process. It is a process of dividing the entire wafer into individual chips by dicing. The earliest wafers were cut with diamond saw blades (grinding wheels), which mainly acted directly on the wafer surface through mechanical force, causing stress damage inside the crystal, prone to wafer edge chipping and chip damage, and the blade had a certain thickness. Therefore, its scribing line width is larger. Grinding wheel scribing uses mechanical force, so there are certain limitations. For wafers with a thickness of less than 100 microns, scribing with a tool can easily lead to wafer breakage, and the scribing efficiency is not high. With the development of laser technology, laser cutting technology is mor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/78
CPCH01L21/78
Inventor 邓胜强程秀全代艳鹏杨松涛郑佳晶
Owner BEIJING SEMICON EQUIP INST THE 45TH RES INST OF CETC
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