Semiconductor element and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems affecting the integrity of spacers and complicated manufacturing process steps
CN106898645BActive Publication Date: 2019-10-11POWERCHIP SEMICON MFG CORP
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Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Patents(China)
Current Assignee / Owner
POWERCHIP SEMICON MFG CORP
Publication Date
2019-10-11

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Abstract

The invention discloses a semiconductor element and a manufacturing method thereof. The semiconductor element includes a substrate; a source doping region disposed in the substrate; a drain doping region disposed in the base and connected with the source doping region separated by a predetermined distance; a channel region between the source doping region and the drain doping region; and a gate structure disposed on the channel region, wherein the gate structure includes a gate dielectric layer, a a gate conductive layer, and a composite stress guiding layer.
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Description

technical field

[0001] The invention relates to a semiconductor element and its manufacturing method, in particular to an improved metal oxide semiconductor (MOS) transistor structure and its manufacturing method. Background technique

[0002] It is known that the stress memorization technique (SMT) has been applied in the semiconductor manufacturing process to improve the electrical performance of the N-type metal oxide semiconductor (NMOS) device. The method includes covering a gate structure with The tensile stress layer is subjected to an SMT annealing process to recrystallize the gate conductive layer, and then the stress layer is removed. After the stress layer is removed, the stress effect can continue to affect the component. The stress effect can enhance the mobility of charges through the channel, which is used to improve device performance.

[0003] However, the disadvantage of the above-mentioned prior art is that additional deposition of a stress layer (usuall...

Claims

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