Image pyramid feature extraction circuit, device and method
An image pyramid and feature extraction technology, applied in image memory management, details involving image processing hardware, processor architecture/configuration, etc., can solve problems such as bandwidth consumption and large computational load, and reduce bandwidth consumption and frame rate requirements. High, the effect of improving the calculation speed
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[0045] Now in conjunction with the accompanying drawings, the preferred embodiments of the present invention will be described in detail.
[0046] figure 1 It is a circuit block diagram of an image pyramid feature extraction circuit 100 according to an embodiment of the present invention, including a parallel reusable read-in circuit 101 , an image pyramid feature calculation circuit 103 and an image pyramid feature confluence output circuit 105 .
[0047] The parallel reusable read-in circuit 101 reads in the basic image frame, and calculates the coordinates of the N valid data rows of the M layer of the image pyramid in the basic image frame, and requests and stores the N valid data rows from the bus according to the coordinates. In this patent, the data rows participating in the image pyramid calculation in the basic image frame are called effective data rows. The image pyramid feature calculation circuit 103 includes M image pyramid feature calculation units, and simultan...
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