A machine learning-based loop tile size selection method

A size selection, machine learning technology, applied in the field of computer program compilation and optimization, to achieve high performance and high loop block size

Active Publication Date: 2017-07-28
西安汉格尚华网络科技有限公司
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  • Abstract
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  • Application Information

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  • A machine learning-based loop tile size selection method
  • A machine learning-based loop tile size selection method
  • A machine learning-based loop tile size selection method

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Embodiment Construction

[0021] In order to make the purpose, technical solution and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the embodiments described here are only used to explain the basic idea of ​​the present invention, and are not used to limit the protection scope of the present invention.

[0022] Embodiments of the present invention are described by taking a DOALL loop, that is, a loop without inter-iteration dependencies, as an example. The cycles described below in the present invention are all DOALL cycles.

[0023] The present invention provides a block size selection method based on machine learning (ML-TSS method for short). The present invention mainly involves innovations in two aspects. First, a novel feature value extraction algorithm (Feature_Capture algorithm for short) is proposed. Second, a novel synthesis program con...

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Abstract

The invention provides a machine learning-based loop tile size selection method. The method comprises the steps of performing synthetic program construction for original DOALL loops and making feature values of n layers of nested loops in synthetic programs comprehensively cover loops in an original program and an actual application program through full arrangement of column subscript tuples; performing feature value extraction on the innermost n layers of loops of 2n layers of nested loops obtained through conversion of the n layers of nested loops, and an optimal tile size vector of the n layers of nested loops is obtained via a global search method to form a neural network training sample set; acquiring an optimal tile size prediction model via training and performance analysis to perform tile size prediction on the DOALL loops in the actual application program. Through the combination of the synthetic program construction and feature value extracting methods and a machine learning process, the method has loop tile sizes with higher performance compared with the prior art.

Description

technical field [0001] The invention relates to the field of compiling and optimizing computer programs, in particular to an efficient loop block size selection method. Background technique [0002] The data locality of the development program can reduce the memory access overhead, and the parallelism of the development program can reduce the processing overhead. The research on these two issues is becoming more and more important in the context of the huge amount of data in the field of scientific computing. In many computationally intensive applications, typified by scientific and engineering computing applications, nested loops can consume a significant amount of computational time. DOALL loops are loops that do not carry dependencies across iterations (all iterations can be fully parallelized with other iterations). Loop block technology is a classic and efficient technology that can enhance the data locality of programs, and can play an important role in enhancing the ...

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Application Information

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IPC IPC(8): G06F9/45
CPCG06F8/433G06F8/452
Inventor 伍卫国刘松崔元桢蒋庆谢骁邹年俊
Owner 西安汉格尚华网络科技有限公司
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