1results about How to "High speedup" patented technology

The invention provides a sparse triangular decoupling parallel acceleration method and system for a large-scale sparse linear equation set in chip simulation, and the method comprises the steps: firstly constructing a directed dependency graph based on a non-zero structure, and completing the segmentation of an initial task; recursively applying nested subdivision to the sub-problems of which the scales exceed a preset threshold value; and meanwhile, a top-down greedy merging mechanism is introduced, and sub-problems with too small scales are aggregated. The generated sub-problems are completely decoupled and can be executed independently and parallelly, and the maximum sub-problem scale is far smaller than that of the original problem. In addition, all dependency analysis results and task division schemes can be reused across right-end terms, on the premise that the non-zero structure of the coefficient matrix is kept unchanged, one-time preprocessing can support any multiple solving tasks, and preprocessing overhead is obviously reduced. According to the scheme, on the basis that the solving precision of a direct method is completely reserved, the parallel computing potential of the multi-core processor is fully released, and the high-throughput and low-delay linear equation set solving capacity is provided for super-large-scale chip simulation.