Method for implementing reconfigurable accelerator custom-built for program

An implementation method and accelerator technology, applied in the direction of program control devices, etc., can solve the problems of low utilization rate and flexibility, increase design cost, etc., and achieve the effect of reducing execution cycle, maintaining flexibility and improving performance

Inactive Publication Date: 2009-05-27
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this specialized coprocessor and accelerator design can only achieve good performance when running the targeted application, the utilization rate and flexibility are not high, and the specialized customization will greatly increase the design cost

Method used

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  • Method for implementing reconfigurable accelerator custom-built for program
  • Method for implementing reconfigurable accelerator custom-built for program
  • Method for implementing reconfigurable accelerator custom-built for program

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Embodiment Construction

[0031] The specific implementation process of the reconfigurable accelerator implementation method customized for programs is as follows.

[0032] 1) Add reconfigurable accelerator-assisted computing:

[0033] On the traditional general-purpose computer system, FPGA is added as a reconfigurable component, and the FPGA is connected to the traditional computer system through the PCI-E bus.

[0034] The reconfigurable accelerator is responsible for processing the calculation-intensive part of the program and accepts the call of the program. After the program calls the reconfigurable accelerator, the reconfigurable accelerator starts to process the input data. During the calculation of the reconfigurable accelerator, the program hangs; when After the execution of the reconfigurable accelerator is completed, the result is returned to the program, and the program continues to execute.

[0035] 2) The program customizes the implementation process of the reconfigurable accelerator, a...

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Abstract

The invention discloses a method for realizing a reconfigurable accelerator customized for a program. The reconfigurable accelerator customized for the program accelerates the program on an FPGA by arranging the FPGA for the prior general-purpose computer system. The method has a main function of analyzing the program, uses functions to calculate information for the runtime of a granularity sampling program, acquires computing-intensive hot spot functions in the program, realizes the hot spot functions as the reconfigurable accelerator on the FPGA, and modifies call of the hot spot functions in the program into call of the corresponding reconfigurable accelerator to accelerate execution of the hot spot functions. The method uses the reconfigurable accelerator to realize the hot spot functions of the program, improves the total speed-up ratio of the program, uses the FPGA to realize the reconfigurable accelerator, achieves the performance of an approximately applied custom integrated circuit, and simultaneously maintains the flexibility of a general-purpose processor.

Description

technical field [0001] The invention relates to the fields of program optimization design and FPGA design, in particular to a method for implementing a reconfigurable accelerator customized for programs. Background technique [0002] With the application of new materials and the development of new technologies, VLSI technology has made great progress, and the number of transistors integrated in a considerable area of ​​the current processor will soon exceed 10 billion. However, due to the problems of transistor utilization efficiency, leakage, heat dissipation, and power consumption, it is not worth the candle to increase the processor frequency to obtain performance improvements. Therefore, multi-core architecture technology has replaced it as the mainstream technology of processors. By packaging multiple processing cores in a single chip, it has realized true parallelism physically, thus relatively improving the utilization efficiency of transistors and alleviating heat di...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/44
Inventor 陈天洲严力科陈度王罡王勇刚
Owner ZHEJIANG UNIV
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