The invention discloses a set of instructions, interfaces, coprocessor methods and system integrity mechanisms for matrix convolution calculations based on the RISC-V instruction set architecture, and efficiently implements traditional matrix convolution calculations by combining software and hardware , using the scalability of the RISC-V instruction set, by designing a small number of instructions and a dedicated convolution calculation unit (ie, a coprocessor), the number of memory accesses and execution cycles of the matrix convolution calculation instructions are reduced, and the application layer software calculation is reduced. It improves the efficiency of large-scale matrix convolution calculations, improves the calculation speed of matrix convolutions, and is also conducive to flexible calls by upper-level developers and simplifies coding design. At the same time, processors designed using the RISC-V instruction set also have huge advantages over ARM, X86 and other architectures in terms of power consumption, volume and flexibility, and can adapt to different application scenarios, and have broad prospects in the field of artificial intelligence.