22 results about "Program optimization" patented technology

The invention relates to a digital twin virtual debugging method for jet printing manufacturing control optimization, and belongs to the technical field related to intelligent manufacturing and industrial control. Comprising the following steps: configuring a control logic program for each equipment sub-module in a jet printing manufacturing equipment twin model through an equipment master controller, and writing the control logic program into a corresponding virtual controller; establishing communication connection between each virtual controller and the twin model, verifying a control logic program in the virtual controller, and verifying and optimizing the control logic program through general control; and inputting each optimized control logic program into the entity controller of the corresponding equipment sub-module, sending a control instruction to the entity controller corresponding to the equipment sub-module of which the current motion is to be verified through general control, driving the equipment sub-module to execute an action, optimizing the control logic program in the current entity controller through the general control, and verifying the current motion of the equipment sub-module. And through multi-round program optimization, a control program of the jet printing manufacturing equipment is obtained. The debugging time and cost of the ink-jet printing equipment can be reduced.

The invention discloses a program compiling device and method, and belongs to the technical field of computers. The device comprises a receiving module used for receiving a log collected by an instrumentation program in the running process of a target program, the instrumentation program is a part of the target program, and the log comprises popularity data of at least one function in the target program; and the compiling module is used for performing biased compiling on the target program based on the popularity data of the at least one function to obtain an updated target program, and the biased compiling comprises compiling of a biased performance optimization operation or compiling of a biased code area compression operation. In this way, the program can be optimized and upgraded better, and user requirements are met.

The invention provides a dynamic instruction replacement method and device, equipment and a storage medium, and the method comprises the steps: determining a to-be-optimized instruction group according to instruction operation information of a plurality of instruction groups, and obtaining a replacement instruction group corresponding to the to-be-optimized instruction group, the performance of the replacement instruction group is better than that of the to-be-optimized instruction group, and the performance of the replacement instruction group is better than that of the to-be-optimized instruction group; and storing the replacement instruction group to a pre-occupied virtual address field, if the to-be-processed current instruction stream comprises the to-be-optimized instruction group, skipping to the virtual address field to execute the replacement instruction group when executing to the to-be-optimized instruction group in the current instruction stream, and skipping to the current instruction stream after the execution of the replacement instruction group is finished, and executing instructions behind the instruction group to be optimized. According to the method and the device, function-level instruction replacement is realized, the program optimization cost is reduced, and the program running efficiency can be effectively improved.

The invention provides a particle program optimization method based on a Shenwei architecture. The method comprises the following steps: analyzing program hotspots, finding and calculating a hotspot function, and optimizing the function by using five means of particle control, step number parameter control, data classification transmission, function expansion and function inline by utilizing the advantages of an SW26010pro architecture; the execution efficiency of the particle program is improved, the computing performance of the Shenwei architecture is fully played, and rapid and effective operation of the large-scale particle computing program is achieved.

The application relates to the technical field of program optimization, and particularly discloses a small program code volume reduction method and device, a storage medium and a computer device. The method comprises the following steps: in response to a small program code volume reduction instruction, determining a target small program to be subjected to volume reduction; acquiring a global configuration file of the target small program, and parsing declared valid page paths from the global configuration file; scanning an engineering directory corresponding to the target small program, and identifying a plurality of page directories contained in the engineering directory; comparing each page directory with the declared valid page paths respectively, so as to screen out redundant page directories not contained in the valid page paths from the plurality of page directories; and deleting the redundant page directories and all files under the redundant page directories, so as to obtain a target small program after code reduction.

The invention discloses a converged media program list arrangement system and a generation method, and belongs to the technical field of media content management and intelligent scheduling. The system comprises a content acquisition module, a feature extraction module, a user portrait and platform model module, a program optimization and arrangement module, an intelligent conflict detection module, a self-adaptive generation module and a feedback optimization module. Unified management of program resources is realized through multi-source content collection and semantic tagging analysis; a multi-objective optimization model is constructed based on the user portrait and the platform strategy, and program lists adapted to different terminals are automatically generated; and dynamically adjusting a programming result by utilizing a conflict detection and self-learning feedback mechanism. According to the method, the intelligent level of convergence media program management can be remarkably improved, the cross-platform content distribution efficiency is optimized, and automatic generation and accurate pushing of the program list are realized.

Embodiments of the invention disclose an instruction fusion method and apparatus, an electronic device, a storage medium and a program product. The method comprises the steps of obtaining a to-be-optimized program; when it is determined that all instructions in the to-be-optimized program belong to the same basic block and the instructions with the dependency relationship in the to-be-optimized program are adjacently arranged, all continuous instruction sequences in the to-be-optimized program are obtained, to-be-fused instruction sequences are determined in all the continuous instruction sequences, and each set of to-be-fused instruction sequences is replaced with a corresponding fusion instruction; when it is determined that all the instructions in the to-be-optimized program do not belong to the same basic block or the instructions with the dependency relationship in the to-be-optimized program are not adjacently arranged, obtaining candidate instructions in the to-be-optimized program, determining to-be-fused instructions in the candidate instructions according to the fixed value-use chains corresponding to the candidate instructions, and fusing the to-be-fused instructions in the to-be-optimized program according to the determined to-be-fused instructions in the to-be-optimized program. And the target instruction sequence corresponding to each instruction to be fused is replaced with the corresponding fusion instruction, so that the program optimization efficiency and the program optimization capability are balanced.

The invention relates to an automatic program optimization method and device for an application program, computer equipment and a storage medium. The automatic program optimization method comprises the following steps: acquiring execution information and initial performance data of each instruction in a plurality of instructions when the application program runs; determining a hotspot instruction according to the execution information of each instruction in the plurality of instructions; obtaining an instruction type of the hotspot instruction, judging an instruction optimization mode corresponding to the instruction type, and if the instruction optimization mode is judged to be based on the configuration template, obtaining a matched target optimization template from a preset template library according to the instruction type; performing code optimization on the hotspot instruction according to an optimization strategy and a code mode configured in the target optimization template to generate an optimization code of the hotspot instruction; and performing program optimization on the application program according to the optimization code and the initial performance data of the application program. According to the method, the accuracy, the automation degree and the efficiency of software performance optimization are improved.

The invention discloses a tensor program functionalization method, tensor program functionalization equipment and a tensor program product. The method comprises the following steps: acquiring a tensor program, and constructing a graph-level intermediate representation program of the tensor program; performing mutation rewriting and tensor version relation labeling on the graph-level intermediate representation program based on a memory dependency graph and an immutable operator of the graph-level intermediate representation program to obtain a rewritten graph-level intermediate representation program; the immutable operator is used for replacing a mutation operator in a graph-level intermediate representation program, and a new version tensor output by the immutable operator and an input source tensor have independent memories; and performing program optimization on the rewritten graph-level intermediate representation program to obtain a functional tensor intermediate representation program based on the static single assignment. The Graph-Level IR program is combined with the static single assignment SSA, so that the side effect of tensor mutation in the Graph-Level IR program is thoroughly eliminated, and the optimization performance of a deep learning compiler on the tensor program is improved.

The invention discloses a program optimization method and device, a program product and electronic equipment, and relates to the field of financial science and technology, the method comprises the steps that static characteristics and dynamic characteristics of a target program are collected, the static characteristics are at least used for representing control flow information, data dependence information and function call information of the target program, and the dynamic characteristics are at least used for representing control flow information of the target program; the dynamic characteristics are at least used for representing function execution information in the target program; performing feature fusion on the static features and the dynamic features to obtain target features of the target program; based on the target feature, determining a program label of the target program, the program label being used for representing a program type of the target program; and performing performance optimization on the target program based on the target feature through a preset model corresponding to the program tag. The technical problem that in the prior art, the program optimization effect is poor due to the fact that the program is optimized only based on the static scanning result of the program is solved.

The invention provides a program optimization method and device, electronic equipment and a storage medium, and relates to the technical field of computers, in particular to the field of program page loading. According to the specific implementation scheme, the method comprises the following steps: counting completion time consumption and midway exit rate of each initialization loading operation in a plurality of serial initialization loading operations in a page loading process of a first program; and under the condition that the completion time consumption and the midway exit rate of each initialization loading operation do not meet preset conditions, combining and optimizing the subprograms corresponding to the plurality of initialization loading operations in the first program to obtain a second program, the second program comprises a subprogram corresponding to a target initialization loading operation obtained by combining and optimizing a plurality of initialization loading operations.

The present application belongs to the field of computer system construction, and particularly relates to a CPU bottleneck analysis model based on performance counter. The present application solves the technical problem that in the prior art, the average delay evaluation of the failure event required for performance evaluation is limited, and the pipeline technology of modern processors makes the failure delay difficult to be fully exposed, thereby affecting the CPI stack to discover the performance bottleneck of the CPU. In the present application, each clock cycle pause of the program instruction is assigned to the corresponding failure event, the relationship between the instruction pause and the failure event is obtained based on the interval analysis model by extracting the key performance signal in the program execution process, so as to construct the performance model and guide the program optimization and processor hardware iteration. The algorithm for constructing the CPI stack by using the performance counter can be deployed on the prototype verification platform and accurately evaluate the processor performance.

The application provides a GPU program optimization method in a parallel environment. A plurality of target models are configured in a GPU cluster for parallel training. The method comprises: performing strategy configuration and memory bottleneck prediction on the parallel training configuration of the target model; using the prediction result, performing throughput optimization through parallel strategy combination and instruction-level performance monitoring; and performing kernel re-optimization on the instruction-level bottleneck occurring in the optimization process, so that the model training and GPU instruction execution efficiency are simultaneously improved.

Machine learning using a frequency image is accurately executed. An information processing apparatus (100) acquires a second frequency image by inputting output of an encoder, which has input a first frequency image, to a decoder. The information processing apparatus (100) trains the encoder and the decoder based on a loss function, the first frequency image, and the second frequency image. In the loss function, a weight related to a first frequency is smaller than a weight related to a second frequency higher than the first frequency.

The invention provides a CGRA compiling method and device based on multistage intermediate representation and a polyhedral model, and relates to the technical field of compiler design. The method comprises the following steps: performing grammar and semantic analysis on a calculation task code or model to obtain an initial intermediate representation, converting to obtain an affine intermediate representation, and executing hardware-independent optimization; performing cyclic transformation and tensor optimization based on a polyhedral model, and realizing mapping by combining regularized mapping and a search strategy; and generating configuration information and an executable file on the reconfigurable architecture according to a mapping result. According to the method, the end-to-end compiling framework is constructed, and the loop program optimization capability of the polyhedral model and a rule-driven rapid mapping mechanism are combined, so that the execution performance and the compiling efficiency of the artificial intelligence task on a coarse-grained reconfigurable architecture are remarkably improved, the problems of optimization hierarchy splitting and low mapping speed of a traditional compiling method are effectively solved, and the method is suitable for large-scale popularization and application. The method is suitable for high-complexity and large-scale parallel artificial intelligence application deployment requirements.

The invention discloses a control program optimization method, a detection system, an electronic device and a storage medium, the control program optimization method is applied to a detection platform, the detection platform is connected with an elevator core component, when a to-be-tested demand is received, a test case is determined according to parameter information of the to-be-tested demand, and the test case is stored in the detection platform; the to-be-tested demand comprises at least one test demand of a to-be-tested function and a target fault; burning the elevator control program to be tested to the detection platform; the test case is executed on the detection platform, response parameters of the elevator core component are obtained, and a test result is obtained; and performing optimization iteration on the elevator control program based on the test result and an expected result, wherein the expected result shows that the elevator is in a normal state. The test case is determined according to the parameter information of the to-be-tested requirement and executed on the detection platform, the test can be carried out without waiting for the idle elevator, the development test duration can be greatly shortened, the development progress of the elevator function is accelerated, and meanwhile the elevator operation safety is guaranteed.

The invention provides a DMA transmission optimization method and system based on intelligent scheduling and data transformation, belongs to the technical field of high-performance computing, and is particularly used for tensor program optimization on a domain-specific accelerator. According to the method, the problems of scheduling missing, low use efficiency and insufficient data conversion and utilization in the existing DMA transmission are solved. According to the technical scheme, the method comprises the steps that a fusion tensor calculation task is divided through a calculation graph rewriting module; the DMA scheduling module analyzes dependency and generates optimal scheduling; the data transformation optimization module inserts transposition and layout transformation operation; and the assembly line generation module creates executable codes to realize data handling and calculation overlapping. The method is mainly used for improving the utilization rate of a DMA engine and the data transmission efficiency and remarkably improving the performance of tensor operation in deep learning training and reasoning.

Embodiments of the present disclosure provide a kernel program processing method and device, a storage medium and a program product, and relate to the technical field of computers. The kernel program processing method comprises: in response to receiving a kernel program processing instruction, obtaining current task information of a target task; wherein the target task is used to generate or update a target kernel program, and the current task information comprises a current working version of the target kernel program; determining a historical memory task corresponding to the target task; wherein the historical memory task is used to maintain a historical task archive; and according to the current task information and the historical task archive, cyclically performing a kernel program optimization step to update the current task information stored in the target task until a preset termination condition is met, and then taking the current working version in the updated current task information as a target working version of the target kernel program. In this way, the efficiency and reliability of kernel program optimization can be improved.

The invention relates to the technical field of computers, and discloses a program optimization method, a medium, electronic equipment and a computer program product. According to the method, when the source code of the application program is compiled, the unoptimized byte code can be generated. And before the non-optimized byte code is optimized, adding identification information of each closure variable in debugging information corresponding to the non-optimized byte code so as to uniquely indicate one closure variable through one piece of identification information. And then, in the code optimization stage, for each function in the unoptimized bytecode, the data flow relationship between bytecode instructions for operating (such as defining and using) each closure variable can be determined according to the identification information of each closure variable, and the data flow analysis process needs fewer resources and is higher in analysis efficiency. And furthermore, on the basis of the data flow relationship corresponding to each closure variable in the unoptimized bytecode, optimization processing such as redundant closure variable elimination and reading operation can be performed on the unoptimized bytecode, so that an optimized bytecode can be obtained.

The invention provides an optimization program determination method and device based on a large model and an intelligent agent, and relates to the technical fields of program optimization, large models, intelligent agents, coding agents, auxiliary programming and the like. According to the specific implementation scheme, candidate optimization programs corresponding to a program to be optimized and performance indexes of the candidate optimization programs are determined; updating at least one of the first database and the second database according to the candidate optimization program and the performance index of the candidate optimization program; wherein the first database is used for storing the optimization program, the difference degree between the optimization program and the optimization program stored in the first database meets a set condition, and the second database is used for storing the optimization program, the performance index of which meets the target distribution characteristic; and determining a target optimization program corresponding to the to-be-optimized program according to the updated first database or the updated second database.

The present disclosure provides a new sampling method for probabilistic programming. One embodiment of the present invention relates to a sampling device having: a control flow selection section that selects a control flow corresponding to each branch of a probabilistic program; a program optimization section that applies a prescribed transformation rule to a program of the selected control flow by backpropagation and optimizes the program; and a sampling section that generates a sample in accordance with the optimized program.

This invention discloses a method, apparatus, device, medium, and product for optimizing a DMA control program. The method includes: acquiring an intermediate representation of the program that matches the DMA control program in a multi-stage pipeline scenario; identifying pairs of equivalent concatenated instructions with reciprocal dominance relationships in the intermediate representation based on the organization logic of each semantic operation instruction; identifying target equivalent concatenated instruction pairs that satisfy optimization conditions among these pairs; and performing impact elimination processing on each target equivalent concatenated instruction pair in the intermediate representation based on the data dependency instructions and all user instructions corresponding to each target equivalent concatenated instruction pair, followed by deleting each target equivalent concatenated instruction pair to optimize the DMA control program. The technical solution of this invention improves the configuration performance of the DMA controller and the efficiency of data transfer tasks, thereby fully utilizing the hardware computing power of the GPU.