Off-chip cache compression method for ultra-high-definition video processing system

Abstract

The invention discloses an off-chip cache compression method for an ultra-high-definition video processing system. The off-chip cache compression method comprises the steps of: S1, grouping: grouping video frame data from an original video input end and video frame data completing a video processing function, so that blocks to be compressed are formed, and then, for each block to be compressed, performing pixel grouping in block; S2, reconstructing: arranging pixel groups in the blocks to be compressed according to pixel height, and then, performing pixel reconstruction through obtaining of an absolute value of the residual error, rate magnification, cut reduction, error compensation and calculation of a pixel reconstruction value sequentially; and S3, compressing: performing coding, code stream packaging, compression processing and compression code stream output control operation of the blocks to be compressed after the pixels are reconstructed, so that a compressed code stream is obtained, and then, writing the compressed code stream in an off-chip cache. By means of the off-chip cache compression method for the ultra-high-definition video processing system disclosed by the invention, the writing bandwidth of an off-chip storage can be effectively reduced; furthermore, the pixels can be improved; the capacity of the off-chip cache can be greatly reduced; and the method is simple, convenient to use and low in cost.

Description

technical field [0001] The invention relates to the technical field of video processing, in particular to an off-chip cache compression method for an ultra-high-definition video processing system. Background technique [0002] In recent years, people's subjective demand for high-quality visual enjoyment and the objective conditions of the rapid development of semiconductor technology have jointly promoted the vigorous development of the video industry, and the rapid industrialization of high-definition 2K, ultra-high-definition 4K, and 8K videos; ultra-high-definition video processing systems, such as UHD TV post-processing ASICs and UHD video codecs generally use a data processing core and an external dynamic memory to work together; the processing core is generally implemented by an ASIC or a coprocessor, and the off-chip memory is used to store a large amount of video data , the processing core needs to access external memory frequently. [0003] However, at the current ...

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Problems solved by technology

[0003] However, at the current technological level, there is a limit to the speed of CMOS integrated circuits, and the improvement of memory access speed has always lagged behind that of logic circuits. Therefore, the bandwidth of memory access is the bottleneck restricting system performance; The problem will also greatly increase the cost and chip power consumption; on the other hand, frequent access to external memory will also bring about a large increase in energy consumption

[0004] In order to solve the bottleneck of bandwidth and energy consumption, compressing off-chip cache data is an effective and feasible method; in these applications, it is generally required to complete the encoding and decoding process at high speed and in real time; random access to frames is required, and even random access to pixel blocks within a frame is required; Lossless or extremely small compression loss, but does not emphasize high compression ratio; these characteristics are not satisfied by general-purpose codecs