NBTI (negative bias temperature instability) degradation detection system for SoC (system on chip)

A detection system and switch tube technology, applied in the field of microelectronics, can solve the problems of complex test methods and low test convenience

Active Publication Date: 2017-09-26
CHINA ELECTRONICS PROD RELIABILITY & ENVIRONMENTAL TESTING RES INST
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional NBTI effect detection method is relatively complicated, and requires a certain storage space to save the test data fo...

Method used

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  • NBTI (negative bias temperature instability) degradation detection system for SoC (system on chip)
  • NBTI (negative bias temperature instability) degradation detection system for SoC (system on chip)
  • NBTI (negative bias temperature instability) degradation detection system for SoC (system on chip)

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Embodiment Construction

[0015] In one embodiment, an SoC on-chip NBTI degradation detection system, such as figure 1 As shown, it includes a measurement ring oscillator 110, a reference ring oscillator 120, a first counter module 130 and a second counter module 140, the measurement ring oscillator 110 is connected to the power supply terminal VDD and the first counter module 130, and the reference ring oscillator 120 is connected to The power terminal VDD and the second counter module 140 .

[0016] The measurement ring oscillator 110 is used to receive an external circuit signal representing the same aging environment as the circuit under test on the SoC chip, and after stopping receiving the external circuit signal, it is connected to the power supply terminal VDD input simultaneously with the reference ring oscillator 120 voltage and start to oscillate, the measurement ring oscillator 110 and the reference ring oscillator 120 output waveforms to the first counter module 130 and the second counter ...

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Abstract

The invention relates to an NBTI (negative bias temperature instability) degradation detection system for a SoC (system on chip). The NBTI degradation detection system comprises a measurement ring oscillator, a reference ring oscillator, a first counter module and a second counter module, wherein the measurement ring oscillator is connected with a power supply end and the first counter module; the reference ring oscillator is connected with a power supply end and the second counter module; the measurement ring oscillator receives signals for characterizing an external circuit located in the same aging environment with a tested circuit on the SoC, after stopping receiving the signals of the external circuit, the measurement ring oscillator accesses voltage input by the power supply end at the same time with the reference ring oscillator and starts oscillation, the measurement ring oscillator and the reference ring oscillator output waveforms to the first counter module and the second counter module respectively during oscillation, the first counter module and the second counter module count levels of the received waveforms, numbers of levels for NBTI degradation detection of the tested circuit are obtained respectively, and whether the tested circuit has NBTI degradation is judged accordingly. The operation is simple and reliable, and test convenience is high.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to an NBTI degradation detection system on a SoC chip. Background technique [0002] The reliability of integrated circuits, especially system-on-chip (SoC), has received high attention, and there are many failure mechanisms, such as hot carrier injection (Hot Carrier Injection, HCI), negative bias temperature instability (Negative Bias Temperature Instability, NBTI) , Positive Bias Temperature Instability (Positive Bias Temperature Instability, PBTI), Time Dependent Dielectric Breakdown (Time Dependent Dielectric Breakdown, TDDB), etc. In the era of nanometer-scale feature size, NBTI effect is the most important factor affecting the reliability of SoC. It leads to a series of problems such as the increase of PMOS transistor threshold voltage and the decrease of saturation leakage current, thus affecting the circuit characteristics of SoC operating frequency and output swin...

Claims

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Application Information

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IPC IPC(8): G01R31/28
CPCG01R31/2874
Inventor 陈义强潘伟锋恩云飞池源雷登云黄云
Owner CHINA ELECTRONICS PROD RELIABILITY & ENVIRONMENTAL TESTING RES INST
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