Gigabit network control circuit based on AMBA-AHB bus

Abstract

The invention discloses a Gigabit network control circuit based on an AMBA-AHB bus. The Gigabit network control circuit comprises a PC, an AMBA-AHB bus module, an MAC controller, a transformer and an optical transceiver. The PC is connected with the AMBA-AHB bus module through a DMA module. The AMBA-AHB bus module is divided into two ways through the MAC controller. The two ways are respectively connected with the transformer and the optical transceiver. The DMA module is also connected with the MAC controller through a storage management module. According to the gigabit network control circuit based on the AMBA-AHB bus, the performance indexes of a bus transmission rate 1Gbps and a host interface transmission rate 5GT / s are realized, layout resources are clearly saved, a chip area is reduced, and the chip power consumption is reduced.

Description

technical field [0001] The invention belongs to the field of computer networks, in particular to a gigabit network control circuit based on AMBA-AHB bus. Background technique [0002] The traditional Ethernet control circuit is mainly composed of a MAC controller and a PHY transceiver. However, with the continuous improvement of the bus transmission rate and the host interface rate, the internal modules of the Ethernet control circuit have increased a lot, mainly including: PCIE module, DMA module, RISC Modules, data frames and frame descriptor storage modules, storage management modules, MAC controllers, PHY and SERDES transceivers, etc., how to design an efficient architecture to interconnect all modules directly affects the transmission performance of the entire circuit. [0003] In the design and implementation method of FPGA-based Gigabit Ethernet controller, the design scheme of using FPGA to realize embedded Gigabit Ethernet is proposed, and the design of three-speed ...

AI Technical Summary

Problems solved by technology

In the data path, the AXI interface based on burst and parallel reading and writing is used for data transmission to ensure the efficient transmission of received and sent data; the configuration path uses a simplified AXI interface to realize the read and write operations of the registers in the MAC controller; although in the entire The internal implementation of the circuit uses a high-speed and low-speed on-chip bus, but the MAC controller and other modules are hung on the low-speed bus, which cannot achieve the host interface gigabit rate

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