Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Microcontroller architecture for embedded CPU core and complete hardware operation system

A microprocessor and operating system technology, applied in the direction of program control, computer control, general control system, etc., to achieve the effect of improving the efficiency of task switching

Inactive Publication Date: 2017-10-17
QINGDAO UNIV
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Among them, task scheduler, timer, event manager, etc. have related research and implementation. Currently, only the "task switcher" has not been implemented.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Microcontroller architecture for embedded CPU core and complete hardware operation system
  • Microcontroller architecture for embedded CPU core and complete hardware operation system
  • Microcontroller architecture for embedded CPU core and complete hardware operation system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] This embodiment selects the MCS-51 microprocessor core as the microprocessor core CPU-Core, and the embedded real-time operating system μC / OS-II is hardwareized as the semi-hardware operating system h-HRTOS, according to the register group RBank of MCS-51 Extended mapped register bank REG-Banks; integrate MCS-51 microprocessor core, mapped register bank REG-Banks and hardwareized μC / OS-II semi-hardware operating system h-HRTOS into one chip to form an embedded MCS-51 microcontroller (microcontroller) with complete hardware operating system: HCPU-51, such as Figure 7 As shown, HCPU-51 is a microprocessor core integrating MCS-51 processor core, mapping register REG-Banks group and μC / OS-II semi-hardware operating system h-HRTOS. MCS-51 is a standard MCS-51 core, including register bank RBank=[SP,A,B,PSW,DPTR,R0~R7]; REG-Banks is a 64-group register bank library extended to RBank, RBankk=[SPk ,Ak,Bk,PSWk,DPTRk,R0~R7k],k∈[1,K]; MUX is a demultiplexer, RBUS is a register...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the microcontroller and the real time operation system technology field, particularly relating to a microcontroller architecture for an embedded CPU core and a complete hardware operation system A microprocessor comprises a register set resource; the register set resource is connected to a mapping register set bank through a register interconnection bus; the CPU core and a semi-hardware operation system are connected through a high speed interconnection bus; the mapping register set bank, the CPU core and the semi-hardware operation system are integrated in a chip to form a microprocessor of an embedded complete hardware operation system; the microprocessor of the embedded complete hardware operation system is connected to an on-chip function module controller set through an on-chip peripheral bus to constitute a microcontroller of the embedded CPU core and the complete hardware operation system. The microcontroller architecture for the embedded CPU core and the complete hardware operation system can produce a microcontroller which is high in instantaneity, high in flexibility, high in adaptability and high in reliability, improves an integration degree of an application system, satisfies requirements of different fields and thus improves reliability and stability of the system.

Description

Technical field: [0001] The invention belongs to the technical field of microcontrollers and real-time operating systems, and relates to a microcontroller architecture with a built-in microprocessor core and a complete hardware operating system. The hardware real-time operating system and the microprocessor are integrated into one chip to form a chip. A single-chip integrated circuit containing a processor and an operating system can effectively improve the real-time performance, flexibility and adaptability of the microcontroller. Background technique: [0002] The embedded system is composed of hardware and software. The two are independent and interdependent. The hardware is the carrier of the software. The software plays a role through the hardware. Among them, the hardware mainly includes embedded processors and application interface circuits, etc.; the software mainly includes embedded operating system and embedded application software. Embedded systems are widely use...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/042
CPCG05B19/0423G05B2219/25257
Inventor 王正彦范延滨
Owner QINGDAO UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products