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Semiconductor device and method for forming same, semiconductor package

A semiconductor and device technology, applied in the field of interface protection based on polysilicon, can solve the problem of small interface protection

Active Publication Date: 2020-12-15
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Interface protection is usually small (compared to primary ESD protection), but must be placed in many places within the IC

Method used

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  • Semiconductor device and method for forming same, semiconductor package
  • Semiconductor device and method for forming same, semiconductor package
  • Semiconductor device and method for forming same, semiconductor package

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Embodiment Construction

[0022] Efficient overvoltage protection is an integral part of IC / ASIC design for system reliability. Field failures are perceived as poor quality by disappointed customers and increase the number of warranty returns. Ignoring this issue can seriously affect a company's image and profitability.

[0023] Therefore, protection devices are an integral part of the product's success. At the same time, the cost of protective devices must be within reasonable limits. In other words, reliable but inexpensive protective devices are needed.

[0024] Embodiments of the present invention achieve these and other objects by integrating interface protection circuitry for protecting active circuits within a semiconductor chip over the same substrate as the semiconductor chip. In various embodiments, the interface protection circuitry is formed entirely within a polysilicon layer formed on the semiconductor substrate. The process for forming the device region of the interface protection ci...

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Abstract

Polysilicon based interface protection is disclosed. Semiconductor devices include active devices of transistors arranged in a semiconductor substrate. The isolation layer is arranged at the semiconductor substrate, and the polysilicon substrate layer is arranged above the isolation layer and the semiconductor substrate. The polysilicon substrate layer includes the semiconductor device region of the interface protection circuit of the transistor.

Description

technical field [0001] The present invention relates generally to semiconductor devices, and more particularly to polysilicon-based interface protection. Background technique [0002] Electrical Overstress (EOS) is considered to be the exposure of a device or integrated circuit (IC) to a current or voltage exceeding its absolute maximum rating. EOS can occur due to voltage overshoots, resulting in high destructive currents. [0003] One type of EOS is electrostatic discharge (ESD), which is referred to as the transfer of electrostatic charge between bulk or surfaces at different electrostatic potentials. ESD can occur due to the sudden discharge of charge from a charged body. ESD occurs when differently charged objects are brought close together or when the dielectric between them breaks down, usually producing a visible spark. ESD is a high current event in the typical range of 0.1A to 30A for a very short time period of 1ns to 200ns. [0004] Many ICs include electrost...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/04
CPCH01L27/04H01L23/3128H01L23/60H01L24/16H01L24/48H01L24/73H01L2224/0401H01L2224/04042H01L2224/16145H01L2224/32225H01L2224/32245H01L2224/48091H01L2224/48227H01L2224/48247H01L2224/73207H01L2224/73265H01L2924/15311H01L25/0657H01L27/0255H01L27/0259H01L27/0266H01L2225/0651H01L2225/06513H01L2225/06568H01L2924/00014H01L2924/00H01L21/28518H01L27/0288H01L27/0292H01L27/0296H01L27/1207H01L2225/0652
Inventor G·朗古斯A·B·伊勒
Owner INFINEON TECH AG