Clock processing device and method for OTN branch board card
A technology of a tributary board and a processing device, applied in the field of optical communication applications, can solve the problems of unstable state of the clock synchronization function, affecting customer experience, and inability to lock the clock source TIE, etc., to achieve the effect of improving user experience
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[0019] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0020] see figure 1 As shown, the embodiment of the present invention provides a clock processing device for an OTN tributary board, which is installed in each OTN tributary board and includes interconnected FPGA (Field Programmable Gate Array), Framer (framing) chip and clock chip. Wherein, the clock chip includes a clock processing module for receiving the 8K clock distributed by the clock unit of the system; the FPGA includes an FPGA processing module for locking the 8K clock received by the clock processing module; the Framer chip includes an SFP (Small Form-factor Pluggables, small Pluggable optical module) module and the 8K clock processing module connected to the SFP module, the SFP module is connected to the FPGA processing module through the LOS (Loss of Signal, optical signal loss) pin, and the 8K clock processing module is...
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