Clock processing device and method for OTN branch board card

A technology of a tributary board and a processing device, applied in the field of optical communication applications, can solve the problems of unstable state of the clock synchronization function, affecting customer experience, and inability to lock the clock source TIE, etc., to achieve the effect of improving user experience

Active Publication Date: 2018-01-12
FENGHUO COMM SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in practical applications, once the service signal accessed by the client side as the clock source is interrupted, the locked clock source will be lost
However, the clock unit of the system usually cannot perceive this event in time, so it will still lock the clock on the client side of this channel, which will cause the system clock to be out of sync.
Even if the clock unit of the system senses the loss of the locked clock source, it cannot respond within 1ms, so that the TIE (Time Interval Error) index of the system locked clock source cannot be reached, which makes the status of the clock synchronization function unstable and affects Customer Experience

Method used

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  • Clock processing device and method for OTN branch board card
  • Clock processing device and method for OTN branch board card
  • Clock processing device and method for OTN branch board card

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Embodiment Construction

[0019] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0020] see figure 1 As shown, the embodiment of the present invention provides a clock processing device for an OTN tributary board, which is installed in each OTN tributary board and includes interconnected FPGA (Field Programmable Gate Array), Framer (framing) chip and clock chip. Wherein, the clock chip includes a clock processing module for receiving the 8K clock distributed by the clock unit of the system; the FPGA includes an FPGA processing module for locking the 8K clock received by the clock processing module; the Framer chip includes an SFP (Small Form-factor Pluggables, small Pluggable optical module) module and the 8K clock processing module connected to the SFP module, the SFP module is connected to the FPGA processing module through the LOS (Loss of Signal, optical signal loss) pin, and the 8K clock processing module is...

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Abstract

The invention discloses a clock processing device and a clock processing method for an OTN branch board card, and relates to the technical field of optical communication application. A Framer chip ofthe device comprises an SFP module and an 8K clock processing module connected with the SFP module. The 8K clock processing module can extract a clock from a client business end specified by the userto a clock unit of the system, and monitors a client business port in real time when the OTN branch board card is used as a clock source; once a fault alarm is monitored, an interruption level signalis output to an FPGA processing module, and meanwhile a clock source switching signal is sent to the clock unit of the system. After the FPGA processing module of the device receives the interruptionlevel signal, a clock extraction channel is closed, and after the clock unit of the system receives the clock source switching signal, the clock source is switched. According to the device and the method provided by the invention, the clock source can be timely switched when the clock source is failed or lost, and a response can be made within 1ms, and thus the TIE index requirement of the systemis met, and user experience is good.

Description

technical field [0001] The present invention relates to the technical field of optical communication applications, in particular to a clock processing device and method for an OTN (Optical Transport Network, Optical Transport Network) tributary board. Background technique [0002] At present, in the field of optical communication applications, especially in the network application scenarios where the clock synchronization function of the whole network is required, in order to realize the clock synchronization function of the whole network, it is usually necessary for each OTN tributary card and the clock unit of the system to jointly perform the clock Synchronous processing. [0003] The clock processing method of the existing OTN tributary boards is usually: each OTN tributary board extracts a clock from a certain port on the client side according to user configuration, and outputs it to the clock unit of the system after frequency division; One clock is locked in the cloc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/16H04J3/06H04L12/24
CPCH04J3/06H04J3/16
Inventor 毛晓波
Owner FENGHUO COMM SCI & TECH CO LTD
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