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Preparation method of via hole, and preparation method of display substrate

A display substrate and via technology, which is used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as excessive slope angle and reduced array substrate product yield, and achieve higher product yield and lower product yields. Effects of poor connectivity issues

Inactive Publication Date: 2018-01-23
BOE TECH GRP CO LTD +1
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AI Technical Summary

Problems solved by technology

[0004] The present invention provides a method for preparing a via hole and a method for preparing a display substrate, which are used to solve the problem that the yield rate of the array substrate product is reduced due to the excessive slope angle of the via hole formed by the via hole preparation method in the prior art

Method used

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  • Preparation method of via hole, and preparation method of display substrate
  • Preparation method of via hole, and preparation method of display substrate
  • Preparation method of via hole, and preparation method of display substrate

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preparation example Construction

[0034] An embodiment of the present invention provides a method for preparing a via hole, which is used to solve the problem that the yield rate of an array substrate product is reduced due to the excessively large slope angle of the via hole formed by the via hole preparation method in the prior art.

[0035] see figure 1 Shown, this preparation method comprises the following steps:

[0036] Step S100, sequentially forming at least two photoresist layers each having a through hole on the film layer to be formed with a via hole, wherein, among any two adjacent photoresist layers, the photoresist layer far away from the film layer The cross-sectional area of ​​the through hole of the layer is greater than the cross-sectional area of ​​the through hole of the photoresist layer close to the film layer, and the through hole of the photoresist layer far away from the film layer is closer to the photoresist layer of the film layer. The projection on the glue layer covers the throug...

Embodiment approach

[0047] Mode 1, in the exposure process, for any two adjacent photoresist layers, the exposure amount of the pattern of the through hole of the photoresist layer far away from the film layer is greater than that of the pattern of the through hole of the photoresist layer close to the film layer exposure. In this embodiment, since the exposure amount of the pattern of the through hole of the photoresist layer away from the film layer is relatively large, a through hole pattern with a larger area can be formed in the developing process, and then the film layer far away from the via hole needs to be formed. The area of ​​the through hole on the photoresist layer is larger than the area of ​​the through hole on the photoresist layer close to the film layer.

[0048] Mode 2, in the exposure process, for any adjacent two photoresist layers, the pattern area of ​​the mask used to form the pattern of the through hole of the photoresist layer away from the film layer is larger than that...

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Abstract

The invention relates to the technical field of display, in particular to a preparation method of a via hole, and a preparation method of a display substrate. The preparation method of the via hole comprises the following steps: forming at least two photoresist layers with through holes on a film layer where the via hole needs to be formed in sequence, wherein in any two adjacent photoresist layers, the cross sectional area of the through hole of the photoresist layer away from the film layer is greater than the cross sectional area of the through hole of the photoresist layer close to the film layer, and the projection of the through hole of the photoresist layer away from the film layer on the photoresist layer close to the film layer covers the through hole of the photoresist layer close to the film layer; and etching the film layer and the areas corresponding to the through holes of the at least two photoresist layers to form the via hole. The problem of reduced product yield of array substrates caused by over large slope angle of the via hole formed by the preparation method of the via hole in prior art can be solved.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a method for preparing a via hole and a method for preparing a display substrate. Background technique [0002] In the manufacturing process of the display panel, the preparation of the array substrate is one of the important processes. The array substrate includes a base substrate and a thin film transistor (Thin Film Transistor; TFT) layer formed on the base substrate. The thin film transistor layer includes multiple layers such as an active layer, a source and drain layer, a gate layer, and an insulating layer. In order to realize the connection between different film layers, it is usually necessary to form a via hole on the insulating layer, and connect the film layers on both sides of the insulating layer through the wires arranged in the via hole. [0003] At present, the via hole is usually prepared by a dry etching process, that is, etching is performed on the thin film...

Claims

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Application Information

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IPC IPC(8): H01L21/77H01L27/12
Inventor 刘宁苏同上成军
Owner BOE TECH GRP CO LTD
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