Cycle address type three-line SPI communication system

A communication system, SPI interface technology, applied in general control systems, control/regulation systems, instruments, etc., can solve problems such as increasing connection complexity, and achieve the effects of simplifying physical connections, improving compatibility, and reducing costs

Active Publication Date: 2018-02-16
BEIJING UNION UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] If there are many peripheral devices, the connection lines between the main control device and peripheral devices will increase with the increase of peripheral devices, which greatly increases the complexity of the connection

Method used

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  • Cycle address type three-line SPI communication system
  • Cycle address type three-line SPI communication system
  • Cycle address type three-line SPI communication system

Examples

Experimental program
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Embodiment Construction

[0029] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0030] Such as figure 2 As shown, the three-wire SPI control system is composed of data length counter DLCT, data length shift register DLSR, frame counter FCT, zero comparator, address counter ACT, selection counter SCT and address decoder.

[0031] The data length counter DLCT is respectively connected with the selection counter SCT, the zero comparator and the frame counter FCT, the data length shift register DLSR is respectively connected with the frame counter FCT and the zero comparator, and the zero comparator is respectively connected with the address counter ACT and the selection counter SCT, The selection counter SCT is connected with the address decoder through the CS delayer. The frame counter FCT is connected to the data length counter DLCT and the data length shift register DLSR respectively.

[0032] The data length counter DLCT is u...

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PUM

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Abstract

The invention discloses a cycle address type three-line SPI communication system, and belongs to the technical field of industrial control. The system herein includes a master control device and a plurality of external devices. The master control device has a CPU. The external devices are data acquiring devices or digital/analog output devices. The master control device and the external devices are provided with standard SPI interfaces. The master control device is connected to respective external devices through a three-line SPI control system by using a clock line SCLK, a data input line MDIand a data output line MDO that have SPI interfaces. The length of each communication is transmitted to the three-line SPI control system prior to the transmission of communication data, while the address information of peripheral chip selection can not be transmitted. According to the invention, the system herein uses "from head cycle chip selection" to select periphery of communication. The entire communication bus simply needs a clock line, and two data lines. The system allows communication with peripherals that have SPI protocols simply by using the three lines, has no special requirements for peripherals that have SPI protocols, and has excellent compatibility.

Description

technical field [0001] The invention discloses a circular address type three-wire SPI communication system, which belongs to the technical field of industrial control. Background technique [0002] Communication between devices in industrial control often uses serial bus, and SPI (Serial Peripheral Interface) is a widely used serial communication protocol, which is supported by most related chip manufacturers. The protocol consists of a start line, a clock line, two data lines and several chip select lines. [0003] When exchanging data with multiple peripheral devices, the main control device will first select a device that wants to communicate with it through the chip select signal, and then send and receive data through the data line under the control of the clock signal on the clock line, and the main control device will control the entire communication process. [0004] If there are many peripheral devices, the connection lines between the main control device and the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/042
CPCG05B19/0423G05B2219/25257
Inventor 王郁昕何宁王金华徐光美张睿哲张敬尊
Owner BEIJING UNION UNIVERSITY
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