Channel hole etching technology adopting novel hard mask

A technology of hard mask and hard mask layer, which is applied in the field of improving the etching process of channel holes, can solve the problems of large thickness, small bottom key size, missing, etc., achieve the reduction of ion scattering and improve the curved shape Effect

Active Publication Date: 2018-02-23
YANGTZE MEMORY TECH CO LTD
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  • Application Information

AI Technical Summary

Problems solved by technology

However, in the deep hole etching process, the hardness of the Kodiak (Kodiak) amorphous carbon layer is not enough, and the thickness of the Kodiak (Kodiak) amorphous carbon layer is large, which will cause the scattering of plasma ions, And this will cause damage to the channel empty
In addition, the use of Kodiak (Kodiak) amorphous carbon layer as a hard mask has the following defects: such as figure 2 As shown in the microscopic schematic diagram of the channel hole top morphology, the channel hole is deformed and part of the channel hole is closed and missing; and as shown in image 3 As shown in the microscopic schematic diagram of the longitudinal cross-sectional morphology of the channel hole, the channel hole has an arc-shaped curved shape, and the bottom critical dimension (CD) is small
[0006] The above-mentioned channel hole defects caused by Kodiak (Kodiak) amorphous carbon layer as a hard mask will affect the overall performance of 3D NAND flash memory. Therefore, how to choose a hard mask material to overcome Kodiak (Kodiak) The above-mentioned defects of the amorphous carbon layer, so as to prepare channel holes with higher yields, have always been the direction of research by those skilled in the art.

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  • Channel hole etching technology adopting novel hard mask
  • Channel hole etching technology adopting novel hard mask
  • Channel hole etching technology adopting novel hard mask

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Embodiment Construction

[0041] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0042] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as ch...

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Abstract

The invention provides a channel hole etching technology adopting a novel hard mask. The technology comprises the steps that metal aluminum is adopted on a buffer oxide (buffer OX) on a stacking structure as a hard mask layer; the thickness of the metal aluminum hard mask layer is 500 , and before etching, chlorine (Cl2) is adopted for etching to open the metal aluminum hard mask layer; then, oxygen is adopted on the metal aluminum hard mask layer for perform short-time oxidation treatment to form an aluminum oxide (Al2O3) protective layer; then, channel hole etching is performed to form channel holes; finally, boron chloride (BCl3) is adopted for removing the Al2O3 protective layer. The metal aluminum hard mask is not damaged by etching, the thickness can be greatly lowered, and thereforethe problem that the channel hole deforms and some channel holes are closed or lost can be solved; the channel hole arc-shaped bent morphology is improved, and the bottom critical dimension (CD) is enlarged.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for improving a channel hole etching process in a 3D NAND flash memory structure. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and to seek lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. At present, in the development process of 3D NAND, as the number of stacked layers increases, higher requirements are put forward for the preparation processes suc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/311H01L21/768
Inventor 方振黄竹青闫伟明黄海辉王猛戴绍龙
Owner YANGTZE MEMORY TECH CO LTD
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