A flat terminal passivation method and semiconductor power device
A technology for power devices and semiconductors, applied in the field of planar terminal passivation methods and semiconductor power devices, can solve the problems of inability to prevent electron accumulation in passivation layers and contamination of impurity ions, reducing reliability of semiconductor power devices, mismatch of expansion coefficients, and the like, Achieve high mechanical properties, stable breakdown voltage and leakage current, and not easy to fall off
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[0044] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0045] A method for passivating a planar terminal provided by an embodiment of the present invention will be described below with reference to the accompanying drawings.
[0046] In this embodiment, a multilayer composite passivation layer is formed by sequentially depositing a dielectric layer, a glass passivation layer and a...
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