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Novel three-level parallel APF based on current interval judgment

A three-level, current technology, applied to the AC network to reduce harmonics/ripples, harmonic reduction devices, etc., can solve the problem of high accuracy and immunity of sensors and signal conditioning circuits, and poor compensation of dead zone effects Integrity, large dependence on control strategies, etc., to achieve the effects of easy versatility, avoiding control interference, reducing switching loss and switching interference

Inactive Publication Date: 2018-03-09
申茂军
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  • Application Information

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Problems solved by technology

But in fact, when the sudden change of the current flow and the change of the phase voltage state are carried out in the same direction at the same time, there is still the possibility of direct connection. It can be seen that the compensation for the dead zone effect by this method is incomplete.
At the same time, the judgment of the polarity of the current has high requirements on the accuracy and immunity of the sensor and the signal conditioning circuit, and there are redundant switching states
In addition, the existing dead zone effect compensation method is highly dependent on the control strategy selected by APF, has a long delay and is not universal

Method used

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  • Novel three-level parallel APF based on current interval judgment

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Embodiment Construction

[0012] As shown in the figure, the novel three-level parallel APF of the present invention includes a direct PWM signal correction method, an inverter circuit, and a nonlinear load.

[0013] The direct PWM signal correction method, due to the constraints of the detection circuit accuracy and sampling speed in practice, is not easy to accurately judge the polarity of the voltage and current signals at the same time, especially when the zero-crossing point jitters. It is easy to cause misjudgment and cause misoperation or loss of control. Therefore, this method only detects the current signal and sets buffers before and after the current zero crossing, so as to reduce the requirements for detection and sampling links and prevent polarity misjudgment caused by zero crossing jitter.

[0014] The inverter control circuit adopts a digital signal processor TMS320F28335 DSP and a programmable logic device FPGA, and the inverter power device adopts an IGBT of Infineon model FP100R12WKT...

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Abstract

The invention discloses a novel three-level parallel APF based on current interval judgment. According to the filter, a direct PWM signal correction method based on current range judgment is employed,and the relation between a working state of a main circuit switch device and a flow direction of harmonic compensation current generated by the APF is analyzed. By using the novel three-level parallel APF of the invention, most dead zones are eliminated, the number of on and off of a switch device is greatly reduced, and switching loss and switching disturbance are reduced. Through setting a current buffer area, the accurate detection of a current zero-crossing point is not needed, and the interference of current zero-crossing point jitter on control is avoided. The scheme is not limited by acontrol strategy employed by the APF and is versatile and easy to implement. According to the scheme, a harmonic compensation effect of the APF is improved through appropriately reducing a carrier period under the premise that other conditions are unchanged.

Description

technical field [0001] The invention belongs to the field of active power filter (APF) dead zone effect, in particular to a novel three-level parallel APF based on current interval judgment. Background technique [0002] With the increasingly serious problem of grid harmonics, active power filter technology has been paid more and more attention. Due to the switching delay of the switching devices that make up the APF power circuit, if it is controlled according to the ideal situation, it will easily cause a shoot-through phenomenon and damage the switching devices. Therefore, the trigger signal is usually delayed for a period of time before it is turned on. This period is the dead time. . The existence of the dead time will make the PWM control pulse narrow or even disappear (the rising and falling edges overlap), which will cause the voltage and current waveforms output by the APF to be distorted, and have a serious impact on the harmonic compensation performance of the AP...

Claims

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Application Information

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IPC IPC(8): H02J3/01
CPCH02J3/01Y02E40/40
Inventor 申茂军
Owner 申茂军
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