SAB technique for semiconductor device

Abstract

The invention discloses an SAB technique for a semiconductor device. The SAB technique comprises the steps of (1) forming a gate structure, source regions and drain regions of the semiconductor device; and (2) determining the required thickness of an SAB film and splitting a forming process of the SAB film by combining the spaces between polysilicon gates to ensure that no gap is formed between the polysilicon gates through the thickness of each SAB sub-film, photoetching the SAB sub-films, removing the SAB sub-film in an area in which metal silicide needs to be formed and achieving full etching of the SAB sub-film between the polysilicon gates, thereby preventing a void from appearing in the subsequent film forming process. According to the SAB technique, no void can be formed between thepolysilicon gates of the semiconductor layer in the process of forming the SAB film, so that the SAB film between the polysilicon gates can be fully etched and the SAB technique does not affect the spaces between the polysilicon gates, thereby facilitating filling of the film.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a SAB process method for a semiconductor device. Background technique [0002] With the rapid development of mobile communications, display technology has also advanced rapidly. Due to the pursuit of higher resolution, larger capacity and larger size, higher requirements are placed on LCD display drivers. Among them, in order to meet the demand for larger capacity, it is necessary to continuously increase the capacity of the embedded SRAM on the basis of ensuring that the chip area remains unchanged, so it is necessary to continuously reduce the SRAM area, such as the SRAM area from 379μm 2 Shrink to 305μm 2 . The area reduction mainly starts with reducing the distance between the polysilicon gates of semiconductor devices, mainly MOS transistors. Usually, side walls need to be formed on the side of the polysilicon gate. Oxide layer sidewalls ar...

AI Technical Summary

Problems solved by technology

The area reduction mainly starts with reducing the distance between the polysilicon gates of semiconductor devices, mainly MOS transistors. Usually, side walls need to be formed on the side of the polysilicon gate. Oxide layer sidewalls are formed. After the formation of double-layer sidewalls, the spacing between polysilicon gates will become smaller. Too small spacing between polysilicon gates will lead to voids (Void) in subsequent film filling.

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