Method for relieving problem of writing disturbance of MLC (Multi-Level Cell) flash memory

Abstract

The invention discloses a method for relieving the problem of writing disturbance of an MLC (Multi-Level Cell) flash memory. The method is characterized in that when LSB (Least Significant Bit) data of a word line of FLASH is written in, the LSB data is simultaneously cached in a buffer area of an SSD (sSolid sState dDisk (SSD); and when MSB (Most Significant Bit) data of the same word line is written in, firstly, the LSB data stored in the buffer area of the hard disk is written in an LSB area of the word line again, and then, the MSB data is written in an MSB area. By additionally storing the LSB data in the cache of the SSD and rewriting the LSB data before the MSB data is written, the LSB data which is possibly disturbed in the flash memory can be corrected, and the correctness of thedata on the whole word line can be ensured.

Description

technical field [0001] The invention relates to a solid-state hard disk control technology, in particular to a method for alleviating the write interference problem of an MLC flash memory. Background technique [0002] In the flash memory unit (Flash Cell), the voltage value of the floating gate transistor (Floating Gate Transistor) is used to represent the stored data, and the flash memory unit of the MLC (Multi Level Cell) flash memory can store multiple bit values, figure 1 It is a schematic diagram of the flash memory unit of the MLC flash memory. The programming of the MLC flash memory unit requires two steps, the first step: programming the LSB of the flash memory unit, and the second step: programming the MSB of the flash memory unit. A flash memory cell that has not been programmed is in an erased state, a flash memory cell that has only completed the first step of programming is in a partial program state, and a state that has completed the second step of programmin...

AI Technical Summary

Problems solved by technology

During the particle verification process, it was found that the threshold voltage of the incomplete state flash memory cells is very susceptible to the influence of the programming process of adjacent flash memory cells, that is to say, the data stored in the incomplete state flash memory cells is prone to bit flips, that is, BER (bit error probability) Will increase, which will greatly reduce the life cycle of the flash memory (lifetime)

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