SoC chip-based deep neural network embedded realization method

Abstract

The invention belongs to the field of airborne intelligent computing, and provides an SoC chip-based deep neural network embedded realization method. The method is realized based on an SoC chip; a neural network main program is realized in a processor core and finishes a global scheduling task; a computing-intensive part is realized in programmable logic and finishes a parallel computing task; andthe two parts perform control instruction and state information exchange through an on-chip high-speed bus to realize cooperative work of a processor and the programmable logic. According to the method provided by the invention, the processor core in an SoC is used for executing an overall scheduling task, so that the dynamical reconfiguration characteristic of an FPGA is better utilized and thenetwork flexibility is improved.

Description

technical field [0001] The invention belongs to the field of airborne intelligent computing, and proposes an embedded implementation method of a deep neural network based on an SoC chip. Background technique [0002] In the 2015 ImageNet Challenge, the image recognition ability of the deep neural network exceeded that of the human eye; in 2016, AlphaGo, an artificial intelligence Go program developed by DeepMind based on the deep neural network, defeated the world champion Li Shishi; in the same year, Google Launched a translator based on deep neural network, the quality of Chinese-English translation reached 80%. The deep neural network has shown better and better application effects in intelligent computing tasks in many fields, and it also has excellent application in the aviation field prospect. Intelligent computing systems based on deep neural networks can better complete auxiliary and even automatic driving tasks. For example, intelligent image recognition can help d...

AI Technical Summary

Problems solved by technology

[0003] However, the scale of deep neural networks is often very large, running on workstations, supercomputers and even computer clusters, it is difficult to run in an airborne embedded computing environment with limited resources. Currently, there are two opinions on the implementation of neural networks in embedded environments. Two main research directions: First, implement based on ASIC custom circuit, and design hardware circuit according to the resource requirements and topological structure of the deep neural network model used; however, ASIC design is difficult and the verification period is long, and the network model cannot be reproduced after the design is completed. change, very inflexible

Another direction is the embedded implementation of deep neural network based on FPGA. Compared with ASIC, FPGA hardware circuit design has a better design iteration speed and can be verified quickly. Moreover, FPGA has reconfigurable characteristics, which can be compared when the network changes. It is easy to make changes; however, the scheduling ability of the FPGA chip is weak, and the timing design is very difficult when implementing a deep neural network

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