Semiconductor device and method for manufacturing semiconductor device

Abstract

The power semiconductor device 100 of the present invention includes: a semiconductor substrate 110, a second semiconductor layer 114 is stacked on the first semiconductor layer 112, a groove 118 is formed on the surface of the second semiconductor layer 114, and a groove 118 is formed in the groove 118. The third semiconductor layer 116 composed of an epitaxial layer; the first electrode 126; the interlayer insulating film 122 having a prescribed opening 128; and the second electrode 124, wherein the inside of the opening 128 is filled with metal and the opening 128 is located away At the central portion of the third semiconductor layer 116 , the second electrode 124 is connected to the third semiconductor layer 116 via a metal, and the surface of the central portion of the third semiconductor layer 116 is covered with an interlayer insulating film 122 . According to the semiconductor device of the present invention, there is provided a semiconductor device including the third semiconductor layer 116 formed of an epitaxial layer formed in the trench 118 and a semiconductor device that is less prone to drop in withstand voltage due to breakdown in punch-through mode.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. Background technique [0002] Conventionally, a MOSFET having a semiconductor base having a trench of a predetermined depth formed on the surface of an n-type semiconductor layer and a p-type semiconductor layer composed of an epitaxial layer formed in the trench has been widely known (for example, refer to Patent Document 1). [0003] Previous MOSFET700 such as Figure 21 shown, including: a semiconductor substrate 710, the n + Type first semiconductor layer 712 is stacked with n - type second semiconductor layer 714, on the surface of the second semiconductor layer 714, a plurality of grooves 718 of a predetermined depth arranged in a predetermined direction are formed, and p - type third semiconductor layer 716 (refer to Figure 22 In the semiconductor base 710'), wherein, a p-type base layer 720 is formed on a part of the surface of t...

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Problems solved by technology

In this case, after a negative potential is applied to the above-mentioned second electrode 724, the depletion layer extending from the pn junction surface between the second semiconductor layer 714 and the third semiconductor layer 716 to the second electrode 724 side may be depleted. Contact with the metal inside the above-mentioned cavity S results in breakdown (breakdown) in the reach through mode, so that the withstand voltage can no longer be maintained (refer to Figure 23 The area surrounded by dotted line A)

[0011] Furthermore, such problems not only occur in MOSFETs, but also occur in diodes and IGBTs, etc.

In addition, such a problem does not only occur when the trench of the n-type semiconductor layer is backfilled with a p-type epitaxial layer, but also occurs when the trench of the p-type semiconductor layer is backfilled with an n-type epitaxial layer.

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