Unlock instant, AI-driven research and patent intelligence for your innovation.

Interruptive test method for sonos flash memory

A test method and disruptive technology, applied in static memory, instruments, etc., can solve problems such as long test time, non-operational impact, etc., to achieve the effect of increasing test rate, reducing test time, and reducing continuous operation time

Active Publication Date: 2021-04-06
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] As far as 95nm embedded (Embedded) SONOS flash memory (Flash) is concerned, there is a self-interfering test problem, which is mainly manifested in the main area, that is, the continuous operation of individual rows in the storage array will affect other non-operating rows, and at certain temperatures under the obvious
Existing intrusive test methods for SONOS flash memory require long test times

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Interruptive test method for sonos flash memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] Such as figure 1 Shown is the flow chart of the method of the embodiment of the present invention, and the interference testing method of the SONOS flash memory of the embodiment of the present invention comprises the following steps:

[0023] Step 1. Provide a SONOS flash memory that needs to be subjected to a disturbance test, and adjust and set disturbance degradation parameters.

[0024] In the embodiment of the present invention, the disturbing degradation parameters include: positive voltage (VPOS), negative voltage (VNEG), reference voltage (VREF) and bit line voltage (VBL).

[0025] The storage array of the SONOS flash memory has a NOR structure.

[0026] The storage array of the SONOS flash memory is a main area, and there are peripheral circuits on the periphery of the main area, and a charge pump is provided in the peripheral circuits. The voltages corresponding to the disturbing degradation parameters are all provided by the voltage pump of the SONOS flash...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a disturbance testing method of a SONOS flash memory, which comprises the following steps: Step 1: providing a SONOS flash memory to be tested for disturbance, and setting disturbance degradation parameters. Step 2: Continuously operate the target storage unit of the SONOS flash memory according to the set disturbing degradation parameters. Step 3: Perform a threshold voltage test on adjacent memory cells and screen out adjacent memory cells whose threshold voltages exceed the range. The present invention sets the disturbance degradation parameters before the continuous operation and the continuous operation is carried out according to the disturbance degradation parameters, which can generate rapid disturbance degradation to adjacent storage units during the continuous operation, thereby saving the time of continuous operation and finally reducing the test Time, improve test rate, save test cost.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a disturbing testing method of a SONOS flash memory. Background technique [0002] In addition to ensuring the functional characteristics of semiconductor devices, reliability evaluation is also an important guarantee, which is an important guarantee for the stable and durable use of devices. [0003] The so-called reliability evaluation refers to the ability of the product to complete the specified functions under the specified conditions and within the specified time. In the process of design and application, the product is constantly subjected to the influence of itself and the external climate environment and mechanical environment, but still needs to be able to work normally, which requires verification by test equipment. At present, the reliability evaluation of memory mainly includes endurance test (ENDURANCE), data retention ability test (DA...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/08
CPCG11C29/08
Inventor 孙黎瑾宋旻皓陈斌斌
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP