High-speed low power consumption divide-by-four/divide-by-five prescaler

Abstract

The invention discloses a high-speed low power consumption divide-by-four / divide-by-five prescaler. The high-speed low power consumption divide-by-four / divide-by-five prescaler comprises a first-stagetrue single phase clock trigger DFF1, a second-stage true single phase clock trigger DFF2, a third-stage true single phase clock trigger DFF3, an NOR gate N1, an NMOS transistor M1 and an NMOS transistor M2; an output end of the NOR gate N1 is connected with a grid electrode of the NMOS transistor M2; a drain electrode of the second NMOS transistor M2 is connected with a source electrode of the NMOS transistor M1; an output end of the first-stage true single phase clock trigger DFF1 is connected with a grid electrode of the NMOS transistor M1; a drain electrode of the NMOS transistor M1 is connected between an output end of a second master latch and a second slave latch of the second-stage true single phase clock trigger DFF2; an output end of the second-stage true single phase clock trigger DFF2 is connected with an input end of the third-stage true single phase clock trigger DFF3 via an NOR gate N2; an output end of the third-stage true single phase clock trigger DFF3 is connected with a first input end of the NOR gate N1 via an NOR gate N3; and a second input end of the NOR gate N1 is connected with a control signal M.

Description

technical field [0001] The invention relates to the technical field of frequency dividers, in particular to a four / five prescaler with high speed and low power consumption. Background technique [0002] Such as figure 2 as shown, figure 2 For the existing RF transceiver system, the entire RF transceiver system must be provided by a frequency synthesizer to provide the clock frequency for up-conversion and down-conversion, or to provide a stable low-noise clock frequency for the digital-analog mixer and the analog-digital mixer. For low-frequency signals, the phase-locked loop frequency synthesizer is the best choice. The phase-locked loop frequency synthesizer stabilizes the clock frequency through negative feedback and can reduce phase noise very well. [0003] A frequency synthesizer is a system that uses one or more high-precision and high-stability standard frequency signals as a reference to generate one or more output frequency signals with the same accuracy and stab...

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