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A Fault Tolerant Method of Parallel FIR Filter Based on bch Coding

A BCH code and filter technology, applied in the direction of using linear codes for error correction/detection, using block codes for error correction/detection, coding, etc. The effect of high fault tolerance

Active Publication Date: 2021-04-13
SUN YAT SEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a parallel FIR filter based on BCH coding in order to solve the problem that the traditional three-mode redundancy scheme has large fault-tolerant overhead resources, or the parallel fault-tolerant scheme combined with Hamming codes cannot simultaneously perform fault tolerance on multiple branches container fault tolerance method

Method used

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  • A Fault Tolerant Method of Parallel FIR Filter Based on bch Coding
  • A Fault Tolerant Method of Parallel FIR Filter Based on bch Coding
  • A Fault Tolerant Method of Parallel FIR Filter Based on bch Coding

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Embodiment 1

[0037] In this embodiment, a BCH coding-based parallel FIR filter error-tolerant method is designed. In the present invention, the parallel fault-tolerant process includes:

[0038] S1. Find the generator polynomial g(x) corresponding to the BCH code by means of a lookup table according to the number of input branches and the number of error correction branches required, and calculate the generator matrix G(x).

[0039] S2. Calculate the XOR combination relationship between the input bit and the parity bit from the generator matrix G(x), regard the input branch as the input bit in the combination constraint relationship, and regard the redundant branch as the combination constraint relationship check bits.

[0040] S21, the XOR combination relationship takes (15,7) BCH code as an example, and calculates the XOR combination relationship between the input bit and the parity bit as:

[0041] a 14 +a 10 +a 8 =a 7

[0042] a 14 +a 13 +a 10 +a 9 +a 8 =a 6

[0043] a 1...

Embodiment 2

[0058] This embodiment is attached in conjunction with the instructions figure 1 , figure 2 3(a) and FIG. 3(b) and a specific parallel FIR filter system module embodiment is described in detail below for the parallel fault-tolerant method proposed by the present invention.

[0059] Consider the system model as follows: in the 7-branch parallel FIR filter, use the (15,7) BCH code to perform fault tolerance on the two branches, modify the filter coefficients of the 3rd and 5th branches, and simulate the single event flipping scenario, Random data input is performed on 7 input branches.

[0060] According to (15,7) BCH code generator polynomial: g(x)=x 8 +x 7 +x 6 +x 4 +1

[0061] Get the generator matrix G(x):

[0062]

[0063] According to G(x), the information is located in the XOR combination relationship between the supervision bits:

[0064] a 14 +a 10 +a 8 =a 7

[0065] a 14 +a 13 +a 10 +a 9 +a 8 =a 6

[0066] a 14 +a 13 +a 12 +a 10 +a 9 =a 5 ...

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Abstract

The invention discloses a parallel FIR filter error-tolerant method based on BCH coding, which belongs to the technical field of satellite communication and on-board load processing. error-capable BCH code; then the corresponding generator matrix is ​​obtained through the BCH code generator polynomial, and the XOR combination relationship between the input bit and the parity bit is obtained according to the generator matrix; the input branch is regarded as the input bit of the BCH code, and the The redundant branch is regarded as the parity bit of the BCH code; finally, the purpose of error detection and error correction is realized by using the combined constraint relationship among the branches. Compared with the traditional three-mode redundancy fault-tolerant method and the fault-tolerant method based on Hamming codes for parallel FIR filters, this method has lower resource overhead and multi-branch fault tolerance, so it can be used with lower resource overhead and more A larger number of fault-tolerant branches can obtain better system bit error rate performance.

Description

technical field [0001] The invention relates to the technical field of satellite communication and on-board load processing, and more specifically relates to a BCH coding-based parallel FIR filter fault-tolerant method. Background technique [0002] When using traditional general fault-tolerant solutions, such as triple-mode redundancy (TMR), for fault tolerance, the decision logic module needs to compare three outputs and select two or three identical results for output. In the parallel FIR filter fault-tolerant environment, the fault-tolerant resource overhead increases significantly with the increase of the number of parallel branches, which is three times that of the required protection branches, which greatly limits the resource usage on the on-board processing platform. [0003] Using the remainder theorem to reduce the accuracy of the third module in the three-module redundancy, thereby reducing the overhead of the verification branch, researchers have proposed a low-...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/15H03H17/02
CPCH03H17/0201H03H2017/0081H03M13/152
Inventor 陈翔贾岛
Owner SUN YAT SEN UNIV