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A method and device for accelerating artificial intelligence

An acceleration device and acceleration chain technology, applied in the computer field, can solve the problems of large main processor time and waiting time, complex data organization of the main processor, high idling rate of AI accelerator, etc., and achieve simple data organization, low power consumption, The effect of simple structure

Active Publication Date: 2020-09-15
阿依瓦(北京)技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The sending and handling of calculation data in the acceleration process requires the main processor to execute, so it takes a lot of main processor time and waiting time
The idling rate of the AI ​​accelerator is relatively high, that is, the waste rate is relatively high and the energy efficiency is low; the data organization of the main processor is relatively complicated, and the chip design is relatively difficult, which is mainly reflected in the global clock

Method used

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  • A method and device for accelerating artificial intelligence
  • A method and device for accelerating artificial intelligence
  • A method and device for accelerating artificial intelligence

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Embodiment Construction

[0056] In the following description, the invention is described with reference to various embodiments. However, one skilled in the art will recognize that the various embodiments may be practiced without one or more of the specific details or with other alternative and / or additional methods, materials or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of the various embodiments of the invention. Similarly, for purposes of explanation, specific quantities, materials and configurations are set forth in order to provide a thorough understanding of the embodiments of the invention. However, the present invention may be practiced without the specific details. Furthermore, it is to be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0057] In this specification, reference to "one embodiment" or "th...

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Abstract

The present invention discloses an acceleration method. The method comprises: determining a template size, an image size and a number M of temples for convolution calculation; determining the number Nof convolution units in an acceleration chain and the shortest length of the data loop based on the image size, the template size, the number of templates, and / or the computing capability of an acceleration apparatus; loading template coefficients into the convolution unit in the acceleration chain; loading multi-line image data into the FIFO buffer; starting the data stream, wherein the image data enters the image data input port of the first convolution unit from the FIFO buffer, each time a line of data is provided to the image data input port of the first convolution unit, the image dataof the previous line is pushed forward by one bit by the image data of the subsequent line, so that the data is calculated while flowing; and storing the result of each calculation in the specified storage location of the result storage.

Description

technical field [0001] The present invention relates to the field of computers, and in particular, the present invention relates to an acceleration method and apparatus for artificial intelligence. Background technique [0002] Convolutional Neural Network (CNN) is a feedforward neural network. Compared with the traditional BP neural network, it has the advantages of high recognition efficiency and good invariance to rotation and scaling. It has been used in digital image processing and face recognition. and other fields have been widely used. [0003] The application principle of the traditional convolutional neural network model is as follows: first, the convolutional neural network template architecture is designed according to the attributes of the image to be input. The designed convolutional neural network template architecture is a multi-layer structure, including an input layer, and the After that, there are several convolutional layers and several downsampling laye...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/063G06T1/60
CPCG06N3/063G06T1/60
Inventor 肖东晋张立群
Owner 阿依瓦(北京)技术有限公司