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Secondary-starting method and device of DSP multi-core array

A two-level start-up and array technology, applied in the direction of program control device, program loading/starting, program control design, etc., can solve the problems of high complexity, DSP multi-core array cannot load the user's main program, large amount of data, etc., to achieve application flexible effects

Inactive Publication Date: 2018-11-06
GUILIN CHANGHAI DEV
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Problems solved by technology

In this way, the amount of data that the signal processing system needs to process is larger and more complex, so the real-time signal processing system must have powerful computing capabilities
[0003] At present, the system program can be loaded through the DSP multi-core array, but there are some problems. For example, when the DSP is a separate main control component, the DSP multi-core array cannot load the user's main program without external network communication support and needs to rely on The support of the external control device is required to realize the loading

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  • Secondary-starting method and device of DSP multi-core array
  • Secondary-starting method and device of DSP multi-core array

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[0045] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0046]The DSP multi-core array includes DSP processor, FPGA (Field-Programmable Gate Array), FLASH memory, EEPROM (Electrically Erasable Programmable read only memory) and RapidIOSwitch switch, etc. The DSP multi-core array communicates through the RapidIO Switch switch. Less, PCB printed circuit board design is simple, good scalability, etc., and multiple link ports can communicate at the same time to double the rate, especially suitable for parallel processing systems composed of multiple DSPs. DSP processor such as TMS320C6474 chip, TMS320C6474 chip supports three Boot startup modes, EMAC (Ethernet port) Boot, SRIO (SRIO high-speed serial IO) Boot, I2C Boot mode;

[0047] In addition to the above three types of l...

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Abstract

The invention provides a secondary-starting method and device of a DSP multi-core array. The method comprises: solidifying a pre-loaded user main-program into a FLASH memory of an external host; solidifying a pre-loaded secondary boot program into an EEPROM (Electrically Erasable Programmable read only memory) of the DSP multi-core array; when the DSP multi-core array is started, generating a power-on resetting signal, and confirming whether a DSP secondary-starting mode is started; retrieving the secondary boot program from the EEPROM to an RAM (Random Access Memory) of the DSP multi-core array according to the power-on resetting signal and DSP secondary-starting mode information, starting and running the secondary boot program, and loading the user main-program in the FLASH memory into processors of the DSP multi-core array through the secondary boot program; and starting and running the user main-program in the processors of the DSP multi-core array. According to the method, a secondary program loading and starting manner is adopted, and an effect that the DSP multi-core array directly loads the user main-program is realized without the need for relying on an external network and an external control device for realizing loading.

Description

technical field [0001] The present invention mainly relates to the technical field of program loading, in particular to a method and device for secondary start-up of a DSP multi-core array. Background technique [0002] With the development of modern science and technology, high technology and high technology are widely used in military warfare, and the dependence on electronic equipment has increased sharply. Electronic warfare has become a key factor affecting the outcome of a war. In the modern electronic countermeasure environment, the signal environment is dense and complex, and new radar systems are constantly emerging, and the signal processing system has gradually achieved high real-time performance, high reliability and miniaturization. In this way, the amount of data that the signal processing system needs to process is larger and the complexity is higher, so the real-time signal processing system must have powerful computing capabilities. [0003] At present, the...

Claims

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Application Information

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IPC IPC(8): G06F9/445G06F9/4401
CPCG06F9/4405G06F9/4408G06F9/44521G06F9/44578
Inventor 何国华
Owner GUILIN CHANGHAI DEV
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