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Static random access memory unit, static random access memory and access method of static random access memory

A static random storage and static random technology, which is applied in the field of integrated circuits, can solve problems such as limiting the performance of SRAM, and achieve the effect of improving output and simplifying process operation

Inactive Publication Date: 2018-11-13
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Among them, the static noise margin includes read noise margin (ReadNoise Margin, RNM) and write noise margin (Write Noise Margin, WNM), the matching of RNM and WNM will limit the performance of SRAM

Method used

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  • Static random access memory unit, static random access memory and access method of static random access memory
  • Static random access memory unit, static random access memory and access method of static random access memory
  • Static random access memory unit, static random access memory and access method of static random access memory

Examples

Experimental program
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Embodiment Construction

[0024] Figure 1a and Figure 1b A circuit connection diagram and component layout diagram of a static random access memory unit are schematically shown, the static random access memory unit includes two sets of symmetrical transistor structures, and each set of transistor structures includes a pull-up transistor (Pull up transistor, PU) 11 (or 14), a pull down transistor (Pull down transistor, PD) 12 (or 15), a pass gate transistor (Pass gate transistor, PG) 13 (or 16), wherein the pull-up transistors in the two sets of transistor structures are both It is PMOS, the pull-down transistor and the pass gate transistor are both NMOS, and the pull-up transistor and the pull-down transistor in each group of transistors (such as the pull-up transistor 11 and the pull-down transistor 12, the pull-up transistor 14 and the pull-down transistor 15) form an inverter respectively, Wherein, the input terminal and the output terminal of one inverter are respectively connected with the outpu...

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PUM

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Abstract

The invention discloses a static random access memory unit. The static random access memory unit comprises two sets of transistors; a quantity ratio of fin structures comprised in a first pull-up transistor, a first pull-down transistor and a first pass-through gate transistor of the first set of the transistors is different from a quantity ratio of fin structures comprised in a second pull-up transistor, a second pull-down transistor and a second pass-through gate transistor of the second set of the transistors; one of the source and the drain of the first pass-through gate transistor is electrically connected with a first bit line; and one of the source and the drain of the second pass-through gate transistor is electrically connected with a second bit line. The static random access memory unit with the asymmetric design is applied to a static random access memory, so that the access of the static random access memory is facilitated, and the performance of the static random access memory is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a static random access memory unit, a static random access memory and an access method thereof. Background technique [0002] With the continuous development of digital integrated circuits, the memory integrated on the chip has become an important part of the digital system. Static Random Access Memory (SRAM) has become an indispensable and important part of on-chip memory due to its advantages of low power consumption and high speed. SRAM can hold data as long as it is powered, there is no need to constantly refresh it. [0003] The static noise margin (Static Noise Margin, SNM) is an important parameter to measure the anti-interference ability of the static random memory unit, which is defined as the amplitude of the maximum DC noise that the static random memory withstand voltage can withstand. If it exceeds this value, The state of the storage node will be flipp...

Claims

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Application Information

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IPC IPC(8): G11C11/412G11C11/417
CPCG11C11/412G11C11/417
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP