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Epitaxial structure and preparation method of soi-based monolithic lateral integration of hbt and cmos

An epitaxial structure, lateral technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of increasing power consumption, small size of GaAs-based substrate, increasing packaging structure and circuit complexity, etc. The effect of improving performance and increasing flexibility

Active Publication Date: 2021-06-11
BEIJING UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The PD module of the mobile phone integrates HBT devices and CMOS devices with independent chips, which not only increases the complexity of the packaging structure and circuit, but also increases power consumption. People hope that high-speed HBT devices and analog devices can be integrated into a single chip.
[0007] At present, HBT devices are mainly prepared with GaAs-based substrates, while CMOS devices are grown on Si-based substrates. Due to the small size of GaAs-based substrates, the preparation is complicated and expensive.

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  • Epitaxial structure and preparation method of soi-based monolithic lateral integration of hbt and cmos
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  • Epitaxial structure and preparation method of soi-based monolithic lateral integration of hbt and cmos

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[0035]In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0036] Below in conjunction with accompanying drawing, the present invention is described in further detail:

[0037] Such as Figure 1-3 As shown, the present invention provides an epitaxial structure of SOI-based monolithic lateral integration of HBT and CMOS. The epitaxial structure is composed of multiple GaAs-based HBTs 20 and multiple C...

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Abstract

The invention discloses an SOI-based single-chip laterally integrated HBT and CMOS epitaxial structure and a preparation method. The epitaxial structure is composed of a plurality of GaAs-based HBTs and a plurality of CMOS laterally integrated on the same SOI substrate; the preparation method is: in the SOI Grow an InGaAs buffer layer on the substrate, then grow each layer on the InGaAs buffer layer in turn to obtain HBT, grow an InGaP etching isolation layer on the HBT, and then pattern it; form the HBT epitaxial structure region and the SOI surface on the SOI substrate Si layer, in the exposed Si layer region of the SOI surface, grow a CMOS structure; through the corresponding epitaxy and material deposition process, the purpose of monolithic lateral integration of SOI-based HBT and CMOS devices can be achieved. The invention can be used in 5G communication to realize single-chip integration of a power amplifier device and an analog device.

Description

technical field [0001] The invention relates to the technical field of semiconductor device integration, in particular to the epitaxial structure and preparation method of SOI-based monolithic lateral integration of HBT and CMOS. Background technique [0002] In recent decades, the semiconductor process has been improving its performance through the continuous reduction of geometric size. The continuous reduction of size not only puts forward higher and higher requirements for equipment and processing technology, but also increases the cost, and due to the limitation of the inherent characteristics of silicon materials , the device speed of silicon process technology has approached the physical limit, further increasing the device speed and maintaining device linearity have faced great scientific and technical problems, without good linear characteristics, high-performance analog integrated circuits have encountered a gap between speed, precision and performance fundamental ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/84
CPCH01L21/84H01L27/1203
Inventor 代京京王智勇兰天李颖
Owner BEIJING UNIV OF TECH