Micro-kernel architecture control system of industrial server and industrial server
A technology for control systems and servers, applied in general control systems, control/regulation systems, and program control in sequence/logic controllers, etc., and can solve problems such as fixed functions, unchangeable functions, and low efficiency.
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Embodiment 1
[0046] figure 1 It is a schematic structural diagram of the microkernel architecture control system of the industrial server provided by Embodiment 1 of the present invention, the system is set in the industrial server, figure 2It is a schematic structural diagram of an industrial server provided in Embodiment 1 of the present invention. The industrial server includes: industrial server hardware, an operating system kernel based on the industrial server hardware, and multiple physical kernels supported by the operating system kernel. Each physical kernel can run multiple Virtual machine, each virtual machine corresponds to a microkernel, and the control program runs on the microkernel, that is, multiple control programs can run on each physical core. Exemplarily, there are 3 physical cores a, b, and c in total. Three control programs a1, a2, and a3 run on physical core a, three control programs b1, b2, and b3 run on physical core b, and three control programs b1, b2, and b3 r...
Embodiment 2
[0070] On the basis of the above technical solution, this embodiment describes the scheduling algorithm based on the timetable. The scheduling algorithm based on the timetable includes: setting multiple timers, wherein the duration of the first timer is the main frame time, The second timer starts successively according to the sequence of multiple time windows in the main frame time, and the duration of the second timer is the same as the duration of each time window successively; with the main frame time as a cycle, start the first timer and the second timer At the same time as the second timer, schedule the control program according to the setting of the timetable. Once the timing of the second timer arrives, schedule the next control program, and once the timing of the first timer arrives, start the next cycle. The schedule includes multiple The start and end time of each time window and the control program corresponding to each time window.
[0071] In this embodiment, a c...
Embodiment 3
[0074] On the basis of the above technical solutions, this embodiment describes the priority-based scheduling algorithm. In this embodiment, the priority of the control program running on one or more physical cores is obtained, and the priority is expressed in an 8-bit binary format, wherein the upper 3 bits are the primary index number, and the lower 5 bits are the secondary index number , mark the corresponding bit in the bitmap of the priority primary index number according to the primary index number, and mark the corresponding bit in the bitmap of the priority secondary index number according to the secondary index number.
[0075] In this embodiment, priority can be configured for each control program, and the range of priority can be set to 0-255, wherein 0 corresponds to the highest level, and 255 corresponds to the lowest level. The state of each control program can be ready, waiting, suspended, etc., suspended or dormant. Only the control programs in the ready state ...
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