A STT-MRAM-based solid-state memory device power-off recovery method
A technology of solid-state memory and storage devices, which is applied to the protection of storage content from loss, instrumentation, and electrical digital data processing, etc. It can solve problems such as data loss and data destruction, and achieve the effect of increasing system reliability and simplifying design complexity.
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[0022] The technical solution of the present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments, and the following embodiments do not constitute a limitation of the present invention.
[0023] like figure 1 As shown, the present invention is based on a STT-MRAM solid-state storage device power-off recovery method, comprising the following steps:
[0024] Step S1, when the power is abnormally cut off, compress the LBA mapping table stored in the system memory into the STT-MRAM using the HASH algorithm, and store the compressed LBA mapping HASH table in the STT-MRAM.
[0025] The solid-state storage device (SSD) of this embodiment includes a system memory, a storage medium, and a magnetic random access memory (STT-MRAM). The system memory generally adopts DRAM, and the storage medium can be NOR flash or NAND flash. The following uses NAND flash as an example for illustration. When the NAND flash is in the programmin...
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