Semiconductor device and manufacturing method thereof
A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problem of high contact resistivity of PMOS, to reduce the source contact resistivity and/or drain contact resistivity, reduce The effect of resistance
Active Publication Date: 2022-03-22
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology
[0005] The main purpose of this application is to provide a semiconductor device and its fabrication method to solve the problem of high contact resistivity of PMOS in the prior art
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[0056] A method of fabricating a semiconductor device includes:
[0057] Such as figure 1 As shown, a semiconductor preparation 10 is provided, and the semiconductor preparation 10 includes a substrate, a shallow trench isolation 13 located in the substrate, a source region 11 and a drain region 12 located on the substrate, and located on and between the source and drain regions. Between the gate 14, the sidewall layer 16 on the surface of the gate 14, and the isolation dielectric layer 15 above the substrate and on both sides of the source and drain regions and on the sidewall layer 16. Wherein, a through hole is formed between the isolation dielectric layer 15 and the side wall layer 16 . The substrate is a Si substrate, the source and drain regions are GeSi source and drain regions doped with B, the gate 14 is a high-K gate, the sidewall layer 16 is a silicon dioxide layer, and the isolation dielectric layer 15 is a silicon dioxide layer. It should be noted, figure 1 F...
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Abstract
The application provides a semiconductor device and a manufacturing method thereof. The method includes: providing a semiconductor preparation, the semiconductor preparation comprising a source region, a drain region, a first pre-metal semiconductor compound layer, the first pre-metal semiconductor compound layer is located on the surface of the source region and / or the drain region, the first pre-metal semiconductor compound layer The semiconductor compound layer includes a first metal and a semiconductor material, and the semiconductor material is selected from GeSi, Si or Ge; so that the surface layer of the first pre-metal semiconductor compound layer away from the source region and / or drain region is doped with a second metal, and / or On the surface of the first pre-metal-semiconductor compound layer away from the source region and / or the drain region, a second metal layer formed by a second metal is arranged, and the work function of the second metal is greater than that of the first metal; The two-metal semiconductor preparation is heat-treated to form a second metal-semiconductor compound layer and a first metal-semiconductor compound layer. The semiconductor device prepared by the manufacturing method has relatively small resistance.
Description
technical field [0001] The present application relates to the field of semiconductors, and in particular, to a semiconductor device and a manufacturing method thereof. Background technique [0002] As the CMOS technology generation enters the technology node of 16 / 14nm and below, the contact resistance of the source and drain regions plays a vital role in the improvement of device performance. [0003] At present, CMOS devices usually only use a metal silicide TiSix, which makes it difficult to form N / P MOS with low contact resistivity at the same time. Moreover, due to the limitation of the solid concentration of impurity B in the source and drain of germanium and silicon, compared with NMOS, the contact of PMOS is reduced. Resistivity is more of a challenge. [0004] The above information disclosed in the Background section is only to enhance the understanding of the background of the technology described herein, therefore, the Background may contain certain information w...
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IPC IPC(8): H01L21/336H01L21/285H01L29/45H01L29/78
CPCH01L29/456H01L29/66477H01L29/78H01L21/28518
Inventor 毛淑娟罗军许静
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI