Random delay S-box-based high-speed AES encryption circuit capable of defending collision attack
An encryption circuit and random delay technology, applied in encryption devices with shift registers/memory, electrical components, digital transmission systems, etc., can solve problems such as collision attacks and circuit collision attacks, and achieve defense against collision attacks and reduce The effect of circuit area
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[0038] The present invention will be further described below in conjunction with the accompanying drawings.
[0039] The existing AES encryption algorithm flow for 128-bit encrypted data is as follows: figure 1 As shown, the plaintext first performs a round key addition operation, and then performs 10 rounds of round transformation operations. figure 2 It is a schematic diagram of the round transformation process. The round transformation includes four operations: byte replacement, row shift, column mix replacement, and round key addition. The 10th round of round transformation does not include the column mix replacement operation.
[0040] Figure 4 is the schematic diagram of S-box collision, Figure 5 The collision attack flow chart is shown below. The premise of implementing a collision attack is that the attacker can successfully detect the occurrence of a collision using the power consumption curve and set a reasonable threshold. Whether it is based on the correlatio...
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